公开(公告)号：US09711621B2

公开(公告)日：2017-07-18

申请号：US14446741

申请日：2014-07-30

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L21/265 ,  H01L29/06 ,  H01L29/417

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A trench transistor having a semiconductor body includes a source region, a body region, a drain region electrically connected to a drain contact, and a gate trench including a gate electrode which is isolated from the semiconductor body. The gate electrode is configured to control current flow between the source region and the drain region along at least a first side wall of the gate trench. The trench transistor further includes a doped semiconductor region having dopants introduced into the semiconductor body through an unmasked part of the walls of a trench.

公开(公告)号：US08674800B2

公开(公告)日：2014-03-18

申请号：US13967053

申请日：2013-08-14

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01F5/00 ,  H01F27/28

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Abstract translation: 公开了半导体器件，半导体器件的制造方法和发送信号的方法。 根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层 第二个半导体芯片。

公开(公告)号：US09269654B2

公开(公告)日：2016-02-23

申请号：US14180146

申请日：2014-02-13

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01F5/00 ,  H01F27/28 ,  H01L23/495 ,  H01L23/48 ,  H01L23/522 ,  H01L25/065 ,  H01L49/02 ,  H01L23/64 ,  H01L23/00 ,  H01F17/00

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

公开(公告)号：US08815686B2

公开(公告)日：2014-08-26

申请号：US13803291

申请日：2013-03-14

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L21/336

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench.

Abstract translation: 在横向沟槽晶体管的半导体本体中制造掺杂半导体区域的方法包括：在半导体本体中形成沟槽，并且通过在半导体本体中进行工艺，将掺杂物引入与沟槽相邻的半导体本体的至少一个区域中 所述掺杂剂通过沟槽的内壁进入至少一个区域。

公开(公告)号：US20130087921A1

公开(公告)日：2013-04-11

申请号：US13621965

申请日：2012-09-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Uwe Wahl

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L23/498 ,  H01L21/50 ,  H01L23/49822 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/19 ,  H01L2223/6688 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor arrangement includes an artificial chip having a semiconductor chip and an electrically insulating molding compound. The semiconductor chip has circuit structures and is embedded into the molding compound at all sides other than at a base area of the semiconductor chip in such a way that a base area of the artificial chip is enlarged by the molding compound relative to the base area of the semiconductor chip. A thin-film substrate is applied to the enlarged base area and extends beyond the base area of the semiconductor chip into the enlarged base area. The substrate has at least two layers composed of nonconductive material between which a structured metallization is disposed. A first coil is formed by one or a plurality of structured metallization layers in the substrate. A second coil is magnetically and/or capacitively coupled to the first coil and galvanically isolated from the first coil.

Abstract translation: 半导体装置包括具有半导体芯片和电绝缘模塑料的人造芯片。 半导体芯片具有电路结构，并且在半导体芯片的基底区域以外的所有侧面嵌入到模塑料中，使得人造芯片的基底面积相对于基底面积增大， 半导体芯片。 将薄膜基板施加到扩大的基底区域并且延伸超出半导体芯片的基底区域到扩大的基底区域中。 衬底具有由非导电材料组成的至少两层，在其之间布置有结构化的金属化。 第一线圈由衬底中的一个或多个结构化金属化层形成。 第二线圈磁性和/或电容耦合到第一线圈并且与第一线圈电隔离。

公开(公告)号：US20140332885A1

公开(公告)日：2014-11-13

申请号：US14446741

申请日：2014-07-30

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.

Abstract translation: 横向沟槽晶体管具有半导体本体，其具有嵌入与半导体本体隔离的栅电极的源极区，源极接触，体区，漏极区和栅极沟槽。 重掺杂半导体区域设置在体区内或与其相邻，并且与源极接触电连接，并且其掺杂剂类型对应于身体区域。

公开(公告)号：US20140159220A1

公开(公告)日：2014-06-12

申请号：US14180146

申请日：2014-02-13

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01L23/495 ,  H01L23/64

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Abstract translation: 公开了半导体器件，半导体器件的制造方法和发送信号的方法。 根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层 第二个半导体芯片。

公开(公告)号：US20130328166A1

公开(公告)日：2013-12-12

申请号：US13967053

申请日：2013-08-14

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01L49/02

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Abstract translation: 公开了半导体器件，半导体器件的制造方法和发送信号的方法。 根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层 第二个半导体芯片。

公开(公告)号：US09099454B2

公开(公告)日：2015-08-04

申请号：US13964153

申请日：2013-08-12

Applicant: Infineon Technologies AG

Inventor： Ulrich Wachter ,  Veronika Huber ,  Thomas Kilger ,  Ralf Otremba ,  Bernd Stadler ,  Dominic Maier ,  Klaus Schiess ,  Andreas Schlögl ,  Uwe Wahl

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/36 ,  H01L21/56

CPC classification number: H01L23/49575 ,  H01L21/561 ,  H01L21/568 ,  H01L23/36 ,  H01L23/49562 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/96 ,  H01L27/14618 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2518 ,  H01L2224/32245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/73273 ,  H01L2224/73277 ,  H01L2224/85 ,  H01L2224/96 ,  H01L2924/12043 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2924/00014

Abstract: A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.

Abstract translation: 通过在模具的第一侧提供具有端子的半导体模具来制造半导体封装，在模具的相对的第二侧提供耦合到模具的材料，并将模具嵌入模制化合物中，使得模具被覆盖 通过除第一面以外的所有侧面的模塑料。 模塑料在靠近模具的第二侧的模塑料的一侧变细，以在模具的第二面露出材料，而不暴露模具的第二面。 在模具的第一侧上的端子形成电连接。 在晶体管管芯的情况下，端子可以是源极端子，并且晶体管管芯可以源极地附接到诸如引线框架的管芯焊盘的金属块。

公开(公告)号：US20150041967A1

公开(公告)日：2015-02-12

申请号：US13964153

申请日：2013-08-12

Applicant: Infineon Technologies AG

Inventor： Ulrich Wachter ,  Veronika Huber ,  Thomas Kilger ,  Ralf Otremba ,  Bernd Stadler ,  Dominic Maier ,  Klaus Schiess ,  Andreas Schlögl ,  Uwe Wahl

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/561 ,  H01L21/568 ,  H01L23/36 ,  H01L23/49562 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/96 ,  H01L27/14618 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2518 ,  H01L2224/32245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/73273 ,  H01L2224/73277 ,  H01L2224/85 ,  H01L2224/96 ,  H01L2924/12043 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2924/00014

Abstract: A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.

Abstract translation: 通过在模具的第一侧提供具有端子的半导体模具来制造半导体封装，在模具的相对的第二侧提供耦合到模具的材料，并将模具嵌入模制化合物中，使得模具被覆盖 通过除第一面以外的所有侧面的模塑料。 模塑料在靠近模具的第二侧的模塑料的一侧变细，以在模具的第二面露出材料，而不暴露模具的第二面。 在模具的第一侧上的端子形成电连接。 在晶体管管芯的情况下，端子可以是源极端子，并且晶体管管芯可以源极地附接到诸如引线框架的管芯焊盘的金属块。