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公开(公告)号:US20230274996A1
公开(公告)日:2023-08-31
申请号:US18105309
申请日:2023-02-03
Applicant: Infineon Technologies AG
Inventor: Stefan SCHWAB , Edward FÜRGUT , Edmund RIEDL , Harry SAX , Stefan KRIVEC , Manfred PFAFFENLEHNER , Carsten SCHAEFFER
CPC classification number: H01L23/3192 , H01L21/56 , H01L23/3135 , H01L24/02 , H01L24/05 , H01L23/291
Abstract: A chip arrangement is provided. The chip arrangement may include a chip including a first main surface, wherein the first main surface includes an active area, a chip termination portion, and at least one contact pad. A first dielectric layer at least partially covers the chip termination portion and the active area, and at least partially exposes the at least one contact pad, and a second dielectric layer formed by atomic layer deposition over the first dielectric layer and over the at least one contact pad.