公开(公告)号：US20220275217A1

公开(公告)日：2022-09-01

申请号：US17585996

申请日：2022-01-27

Applicant: Infineon Technologies AG

Inventor： Stefan SCHWAB ,  Edmund RIEDL

IPC: C09C3/06 ,  H01L23/18 ,  H01L23/29 ,  H01L23/31

Abstract: Filler particle for a composite is disclosed. In one example, the filler particle comprises a core, and a shell which at least partially covers the core and has a morphological adhesion promoter.

公开(公告)号：US20230274996A1

公开(公告)日：2023-08-31

申请号：US18105309

申请日：2023-02-03

Applicant: Infineon Technologies AG

Inventor： Stefan SCHWAB ,  Edward FÜRGUT ,  Edmund RIEDL ,  Harry SAX ,  Stefan KRIVEC ,  Manfred PFAFFENLEHNER ,  Carsten SCHAEFFER

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/3192 ,  H01L21/56 ,  H01L23/3135 ,  H01L24/02 ,  H01L24/05 ,  H01L23/291

Abstract: A chip arrangement is provided. The chip arrangement may include a chip including a first main surface, wherein the first main surface includes an active area, a chip termination portion, and at least one contact pad. A first dielectric layer at least partially covers the chip termination portion and the active area, and at least partially exposes the at least one contact pad, and a second dielectric layer formed by atomic layer deposition over the first dielectric layer and over the at least one contact pad.

公开(公告)号：US20170323865A1

公开(公告)日：2017-11-09

申请号：US15659670

申请日：2017-07-26

Applicant: Infineon Technologies AG

Inventor： Manfred MENGEL ,  Alexander HEINRICH ,  Steffen ORSO ,  Thomas BEHRENS ,  Oliver EICHINGER ,  Lim FONG ,  Evelyn NAPETSCHNIG ,  Edmund RIEDL

IPC: H01L23/00 ,  B23K35/28 ,  B23K35/30 ,  C22C13/00 ,  C22C18/00 ,  C22C18/04 ,  C22C30/06 ,  H01L23/488 ,  H01L23/495 ,  B23K1/00 ,  C22C30/04 ,  B23K35/26

CPC classification number: H01L24/48 ,  B23K1/0016 ,  B23K35/262 ,  B23K35/282 ,  B23K35/3013 ,  C22C13/00 ,  C22C18/00 ,  C22C18/04 ,  C22C30/04 ,  C22C30/06 ,  H01L23/488 ,  H01L23/49513 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85455 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/207

Abstract: A chip arrangement including a chip comprising a chip back side; a back side metallization on the chip back side, the back side metallization including a plurality of layers; a substrate comprising a surface with a metal layer; a zinc-based solder alloy configured to attach the back side metallization to the metal layer, the zinc-based solder alloy having by weight 8% to 20% aluminum, 0.5% to 20% magnesium, 0.5% to 20% gallium, and the balance zinc; wherein the metal layer is configured to provide a good wettability of the zinc-based solder alloy on the surface of the substrate. The plurality of layers may include one or more of a contact layer configured to contact a semiconductor material of the chip back side; a barrier layer; a solder reaction, and an oxidation protection layer configured to prevent oxidation of the solder reaction layer.

公开(公告)号：US20230064442A1

公开(公告)日：2023-03-02

申请号：US17879900

申请日：2022-08-03

Applicant: Infineon Technologies AG

Inventor： Chan Whai Augustine KAN ,  Martin MAYER ,  Edmund RIEDL ,  Edward FUERGUT ,  Harry Walter SAX

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/42 ,  H01L23/00

Abstract: A chip package structure is disclosed. In one example, the chip package may include a chip, an encapsulation material, and an exposed pad that is electrically conductively connected to the chip. A layer of a porous or dendrite-comprising adhesion promoter is on a surface of the exposed pad. A thermal interface material that is attached to the exposed pad by the layer.

公开(公告)号：US20230027669A1

公开(公告)日：2023-01-26

申请号：US17872338

申请日：2022-07-25

Applicant: Infineon Technologies AG

Inventor： Chee Yang NG ,  Edmund RIEDL ,  Joseph Victor SOOSAI PRAKASAM

IPC: H01L23/00 ,  H01L23/495

Abstract: An electronic system is disclosed. In one example, the electronic system comprises an at least partially electrically conductive carrier, an electronic component, and an intermetallic connection structure connecting the carrier and the component. The intermetallic connection structure comprising an intermetallic mesh structure in a central portion of the intermetallic connection structure, and opposing exterior structures without intermetallic mesh and each arranged between the intermetallic mesh structure and the carrier or the component.

公开(公告)号：US20210167034A1

公开(公告)日：2021-06-03

申请号：US17149741

申请日：2021-01-15

Applicant: Infineon Technologies AG

Inventor： Manfred MENGEL ,  Alexander HEINRICH ,  Steffen ORSO ,  Thomas BEHRENS ,  Oliver EICHINGER ,  Lim FONG ,  Evelyn NAPETSCHNIG ,  Edmund RIEDL

IPC: H01L23/00 ,  B23K35/30 ,  B23K35/26 ,  B23K35/28 ,  C22C13/00 ,  C22C18/00 ,  C22C18/04 ,  C22C30/04 ,  C22C30/06 ,  H01L23/488 ,  H01L23/495 ,  B23K1/00

Abstract: A chip arrangement including: a chip including a chip back side; a substrate including a surface with a plating; and a zinc-based solder alloy which attaches the chip back side to the plating on the surface of the substrate, the zinc-based solder alloy including, by weight, 1% to 30% aluminum, 0.5% to 20% germanium, and 0.5% to 20% gallium, wherein a balance of the zinc-based solder alloy is zinc.

公开(公告)号：US20190131218A1

公开(公告)日：2019-05-02

申请号：US15797297

申请日：2017-10-30

Applicant: Infineon Technologies AG

Inventor： Wu Hu LI ,  Edmund RIEDL ,  Thomas HOREDT ,  Ali MAZLOUM-NEJADARI

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/14 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L21/4821 ,  H01L23/14 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L2224/32245 ,  H01L2224/3512 ,  H01L2224/3716 ,  H01L2224/37572 ,  H01L2224/37611 ,  H01L2224/37616 ,  H01L2224/37618 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/40175 ,  H01L2224/48245 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/2064 ,  H01L2924/20641

Abstract: A connection member for connecting an electronic chip, wherein the connection member comprises a bulk body, and a coating at least partially coating the bulk body and comprising a material having higher electric and higher thermal conductivity than the bulk body, wherein a ratio between a thickness of the coating and a thickness of the bulk body is at least 0.0016 at at least a part of the connection member.