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公开(公告)号:US11903132B2
公开(公告)日:2024-02-13
申请号:US18122988
申请日:2023-03-17
Applicant: Infineon Technologies AG
Inventor: Petteri Palm , Martin Benisek , Liu Chen , Frank Daeche , Josef Maerz
CPC classification number: H05K1/181 , H05K1/021 , H05K1/0298 , H05K1/0306
Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
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公开(公告)号:US20210127490A1
公开(公告)日:2021-04-29
申请号:US16663947
申请日:2019-10-25
Applicant: Infineon Technologies AG
Inventor: Petteri Palm , Martin Benisek , Liu Chen , Frank Daeche , Josef Maerz
Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
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公开(公告)号:US20240312799A1
公开(公告)日:2024-09-19
申请号:US18122895
申请日:2023-03-17
Applicant: Infineon Technologies AG
Inventor: Robert Fehler , Angela Kessler , Kushal Kshirsagar , Emanuele Bodano , Martin Benisek
IPC: H01L21/56 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/538
CPC classification number: H01L21/565 , H01L23/3121 , H01L23/3735 , H01L23/5383 , H01L23/5385 , H01L24/32 , H01L2224/32245 , H01L2924/13055 , H01L2924/13091 , H01L2924/1815
Abstract: A semiconductor package includes a laminate package substrate, first and second power transistor dies embedded within the laminate package substrate, a driver die embedded within the laminate package substrate, a plurality of I/O routings electrically connected with I/O terminals of the driver die, a switching signal pad electrically connected with a second load terminal of the first power transistor die and a first load terminal of the second power transistor die, and a shielding pad that is configured to electrically shield at least one of the I/O routings from the switching signal pad during operation of the first and second power transistor dies.
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公开(公告)号:US11632860B2
公开(公告)日:2023-04-18
申请号:US16663947
申请日:2019-10-25
Applicant: Infineon Technologies AG
Inventor: Petteri Palm , Martin Benisek , Liu Chen , Frank Daeche , Josef Maerz
Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
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公开(公告)号:US20230240012A1
公开(公告)日:2023-07-27
申请号:US18122988
申请日:2023-03-17
Applicant: Infineon Technologies AG
Inventor: Petteri Palm , Martin Benisek , Liu Chen , Frank Daeche , Josef Maerz
CPC classification number: H05K1/181 , H05K1/021 , H05K1/0298 , H05K1/0306
Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
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