公开(公告)号：US20140206109A1

公开(公告)日：2014-07-24

申请号：US13745550

申请日：2013-01-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Peter Ossimitz ,  Matthias von Daak ,  Gottfried Beer

IPC: H01L21/66

CPC classification number: H01L22/10 ,  G01R31/2884 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A method of producing and testing a chip package is described. The chip package to be produced includes a semiconductor chip containing an integrated circuit and a reinforcing structure attached to the semiconductor chip. Further, the chip package has a lower main face and an upper main face opposite to the lower main face, wherein the lower main face is at least partly formed by an exposed surface of the semiconductor chip and the upper main face is formed by a terminal surface of the reinforcing structure on which external terminal pads of the chip package are arranged. After production, the package is subjected to a package-level burn-in test.

Abstract translation: 描述了制造和测试芯片封装的方法。 要制造的芯片封装包括一个包含集成电路的半导体芯片和一个附着在半导体芯片上的加强结构。 此外，芯片封装具有与下主面相对的下主面和上主面，其中下主面至少部分地由半导体芯片的暴露表面形成，并且上主面由终端形成 所述加强结构的表面布置有所述芯片封装的外部端子焊盘。 生产后，对包装进行封装级老化测试。

公开(公告)号：US09082644B2

公开(公告)日：2015-07-14

申请号：US13745550

申请日：2013-01-18

Applicant: Infineon Technologies AG

Inventor： Peter Ossimitz ,  Matthias von Daak ,  Gottfried Beer

IPC: H01L21/66 ,  G01R31/28

CPC classification number: H01L22/10 ,  G01R31/2884 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A method of producing and testing a chip package is described. The chip package to be produced includes a semiconductor chip containing an integrated circuit and a reinforcing structure attached to the semiconductor chip. Further, the chip package has a lower main face and an upper main face opposite to the lower main face, wherein the lower main face is at least partly formed by an exposed surface of the semiconductor chip and the upper main face is formed by a terminal surface of the reinforcing structure on which external terminal pads of the chip package are arranged. After production, the package is subjected to a package-level burn-in test.

Abstract translation: 描述了制造和测试芯片封装的方法。 要制造的芯片封装包括一个包含集成电路的半导体芯片和一个附着在半导体芯片上的加强结构。 此外，芯片封装具有与下主面相对的下主面和上主面，其中下主面至少部分地由半导体芯片的暴露表面形成，并且上主面由终端形成 所述加强结构的表面布置有所述芯片封装的外部端子焊盘。 生产后，对包装进行封装级老化测试。