公开(公告)号：US10967450B2

公开(公告)日：2021-04-06

申请号：US15971830

申请日：2018-05-04

申请人： Infineon Technologies AG

发明人： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Markus Heinrici ,  Karin Delalut ,  Claudia Friza

IPC分类号： B23H7/06 ,  B23H7/10 ,  B23H7/14 ,  B23H7/30 ,  B23H7/34 ,  B23H1/02

摘要： A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.

公开(公告)号：US20190337069A1

公开(公告)日：2019-11-07

申请号：US15971830

申请日：2018-05-04

申请人： Infineon Technologies AG

发明人： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Markus Heinrici ,  Karin Delalut ,  Claudia Friza

IPC分类号： B23H7/06 ,  B23H7/10 ,  B23H7/14 ,  B23H7/30 ,  B23H7/34 ,  B23H1/02

摘要： A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.

公开(公告)号：US20200343085A1

公开(公告)日：2020-10-29

申请号：US16397795

申请日：2019-04-29

申请人： Infineon Technologies AG

发明人： Nirdesh Ojha ,  Roland Rupp ,  Francisco Javier Santos Rodriguez

IPC分类号： H01L21/02 ,  H01L29/16 ,  B23H7/06 ,  B23H7/32 ,  B23H7/34 ,  B23H3/02

摘要： A method includes producing a bulk substrate and beveling an edge of the bulk substrate using an electrical discharge machining (EDM) process and/or an electrochemical discharge machining (ECDM) process.

公开(公告)号：US20190295855A1

公开(公告)日：2019-09-26

申请号：US15935867

申请日：2018-03-26

申请人： Infineon Technologies AG

发明人： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez

IPC分类号： H01L21/326 ,  H01L21/304 ,  H01L21/288 ,  B23H7/26

摘要： A method of structuring and/or thinning a semiconductor wafer having a plurality of functional chip sites includes forming one or more semiconductor devices in a device region of each functional chip site at a frontside of the semiconductor wafer, and forming an electrode at one of the frontside or a backside of the semiconductor wafer. The side of the semiconductor wafer at which the electrode is formed is structured by applying voltage pulses between the electrode and a tool electrode positioned above the semiconductor wafer as part of an electrical discharge machining (EDM) process before the electrode is removed by the EDM process, and between the tool electrode and an intrinsic conductive layer formed on the side of the semiconductor wafer being structured after the electrode is removed by the EDM process.