公开(公告)号：US10075284B1

公开(公告)日：2018-09-11

申请号：US15364602

申请日：2016-11-30

Applicant: Integrated Device Technology, Inc.

Inventor： Silvana Rodrigues ,  Michael Rupert ,  Zaher Baidas ,  Leon Goldin

IPC: H04L7/00 ,  H04L7/033 ,  H04L25/49 ,  H04L12/935

CPC classification number: H04L7/033 ,  H04J3/0688 ,  H04J3/0697 ,  H04L25/4902 ,  H04L49/30

Abstract: A system and method for clock phase alignment at a plurality of line cards over a backplane of a communication system. Phase adjustments are continually made for the clock signals at the line cards by dynamically measuring the propagation delay between the timing device and each of the plurality of line cards and continuously communicating the appropriate phase adjustment to each of the plurality of line cards.