SEPARATE CLOCK SYNCHRONOUS ARCHITECTURE
    1.
    发明申请

    公开(公告)号:US20180284835A1

    公开(公告)日:2018-10-04

    申请号:US15475328

    申请日:2017-03-31

    CPC classification number: G06F1/12 G06F1/08 G06F13/4291

    Abstract: An apparatus includes a plurality of independently clocked devices and a low frequency beacon. Each of the plurality of independently clocked devices has a respective local clock generator. The low frequency beacon communicates a low frequency synchronization signal to each of the independently clocked devices. The respective local clock generators of the plurality of independently clocked devices are generally synchronized using the low frequency synchronization signal.

    Separate clock synchronous architecture

    公开(公告)号:US10261539B2

    公开(公告)日:2019-04-16

    申请号:US15475328

    申请日:2017-03-31

    Abstract: An apparatus includes a plurality of independently clocked devices and a low frequency beacon. Each of the plurality of independently clocked devices has a respective local clock generator. The low frequency beacon communicates a low frequency synchronization signal to each of the independently clocked devices. The respective local clock generators of the plurality of independently clocked devices are generally synchronized using the low frequency synchronization signal.

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