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公开(公告)号:US20220199551A1
公开(公告)日:2022-06-23
申请号:US17129838
申请日:2020-12-21
Applicant: Intel Corporation
Inventor: Amit Kumar JAIN , Sameer SHEKHAR , Telesphor KAMGAING , Chin Lee KUAN , Vivek SAXENA
IPC: H01L23/00 , H01L25/065 , H01L23/64 , H01L49/02 , H01L23/498
Abstract: Embodiments disclosed herein include electronic packages with stiffeners. In an embodiment, a stiffener for an electronic package comprises a first layer, that is conductive, and a second layer over the first layer, where the second layer is insulative. In an embodiment, the stiffener further comprises a third layer over the second layer, where the third layer is conductive. In an embodiment, the stiffener further comprises a leg attached to the third layer, where the leg extends towards the first layer and is substantially coplanar with a surface of the first layer opposite from the second layer.
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2.
公开(公告)号:US20200051884A1
公开(公告)日:2020-02-13
申请号:US16059513
申请日:2018-08-09
Applicant: Intel Corporation
Inventor: Sameer SHEKHAR , Amit Kumar JAIN , Kaladhar RADHAKRISHNAN , Jonathan P. DOUGLAS , Chin Lee KUAN
IPC: H01L23/367 , H01L23/498 , H01L23/522 , H01L23/00 , G06F1/20
Abstract: Embodiments disclosed herein include electronics packages with improved thermal pathways. In an embodiment, an electronics package includes a package substrate. In an embodiment, the package substrate comprises a plurality of backside layers, a plurality of front-side layers, and a core layer between the plurality of backside layers and the plurality of front-side layers. In an embodiment, an inductor is embedded in the plurality of backside layers. In an embodiment, a plurality of bumps are formed over the front-side layers and thermally coupled to the inductor. In an embodiment, the plurality of bumps are thermally coupled to the core layer by a plurality of vias.
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公开(公告)号:US20190304923A1
公开(公告)日:2019-10-03
申请号:US15939162
申请日:2018-03-28
Applicant: Intel Corporation
Inventor: Sameer SHEKHAR , Chin Lee KUAN , Amit Kumar JAIN
IPC: H01L23/552 , H01L23/00
Abstract: Embodiments herein relate to a package having a substrate with a core layer with a plurality of conductors coupling a first side of the core layer with a second side of the core layer, and a shield within the core layer that separates a first conductor of the plurality of conductors from a second conductor of the plurality of conductors where the shield is to reduce electromagnetic interference received by the second conductor that is generated by the first conductor. Embodiments may also be related to a package having a substrate with a through hole via through the substrate, where an EMI protective material is applied to a surface of the substrate that forms the via to shield an inner portion of the via.
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