公开(公告)号：US10140138B2

公开(公告)日：2018-11-27

申请号：US14216493

申请日：2014-03-17

Applicant: Intel Corporation

Inventor： Mohammad Abdallah ,  Ankur Groen ,  Erika Gunadi ,  Mandeep Singh ,  Ravishankar Rao

IPC: G06F9/38 ,  G06F9/44 ,  G06F9/455 ,  G06F12/0875 ,  G06F12/1027 ,  G06F9/30 ,  G06F12/1036 ,  G06F9/32 ,  G06F12/109

Abstract: Methods for supporting wide and efficient front-end operation with guest architecture emulation are disclosed. As a part of a method for supporting wide and efficient front-end operation, upon receiving a request to fetch a first far taken branch instruction, a cache line that includes the first far taken branch instruction, a next cache line and a cache line located at the target of the first far taken branch instruction is read. Based on information that is accessed from a data table, the cache line and either the next cache line or the cache line located at the target is fetched in a single cycle.

公开(公告)号：US10740126B2

公开(公告)日：2020-08-11

申请号：US16166010

申请日：2018-10-19

Applicant: Intel Corporation

Inventor： Mohammad Abdallah ,  Ankur Groen ,  Erika Gunadi ,  Mandeep Singh ,  Ravishankar Rao

IPC: G06F9/32 ,  G06F12/08 ,  G06F9/455 ,  G06F12/0875 ,  G06F12/1027 ,  G06F9/30 ,  G06F12/1036 ,  G06F9/38

Abstract: Methods for supporting wide and efficient front-end operation with guest architecture emulation are disclosed. As a part of a method for supporting wide and efficient front-end operation, upon receiving a request to fetch a first far taken branch instruction, a cache line that includes the first far taken branch instruction, a next cache line and a cache line located at the target of the first far taken branch instruction is read. Based on information that is accessed from a data table, the cache line and either the next cache line or the cache line located at the target is fetched in a single cycle.

公开(公告)号：US20190056964A1

公开(公告)日：2019-02-21

申请号：US16166010

申请日：2018-10-19

Applicant: Intel Corporation

Inventor： Mohammad Abdallah ,  Ankur Groen ,  Erika Gunadi ,  Mandeep Singh ,  Ravishankar Rao

IPC: G06F9/455 ,  G06F12/109 ,  G06F12/1036 ,  G06F12/1027 ,  G06F12/0875 ,  G06F9/30 ,  G06F9/38 ,  G06F9/32

Abstract: Methods for supporting wide and efficient front-end operation with guest architecture emulation are disclosed. As a part of a method for supporting wide and efficient front-end operation, upon receiving a request to fetch a first far taken branch instruction, a cache line that includes the first far taken branch instruction, a next cache line and a cache line located at the target of the first far taken branch instruction is read. Based on information that is accessed from a data table, the cache line and either the next cache line or the cache line located at the target is fetched in a single cycle.