公开(公告)号：US20250112772A1

公开(公告)日：2025-04-03

申请号：US18375421

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Sachin TANEJA ,  Sanu K. MATHEW ,  Christopher B. WILKERSON ,  Raghavan KUMAR ,  Anupam GOLDER

IPC: H04L9/30 ,  H04L9/00 ,  H04L9/08

Abstract: Bandwidth of High Bandwidth Memory (HBM) and scratch pad memory used by an Fully Homomorphic Encryption (FHE) accelerator in a System-on-Chip (SoC) during FHE relinearization is reduced by including a key generator module in the SoC. The key generator module to generate FHE public keys from a seed that is input to the SoC. The seed used by the on-die key generator module to generate FHE relinearization public keys locally within the scratch pad memory units in the SoC.