公开(公告)号：US20250005100A1

公开(公告)日：2025-01-02

申请号：US18217564

申请日：2023-07-01

Applicant: Intel Corporation

Inventor： Raghavan KUMAR ,  AppaRao CHALLAGUNDLA ,  Sanu K. MATHEW ,  Christopher B. WILKERSON ,  Adish VARTAK ,  Sachin TANEJA ,  Minxuan ZHOU ,  Lalith Dharmesh KETHARESWARAN

IPC: G06F17/14

Abstract: Examples include techniques for contention-free routing for number-theoretic-transform (NTT) or inverse-NTT (iNTT) computations routed through a parallel processing device. Examples include a tile array that includes a plurality of tiles arranged in a 2-dimensional mesh interconnect-based architecture. Each tile includes a plurality of compute elements configured to execute NTT or iNTT computations associated with a fully homomorphic encryption workload.