公开(公告)号：US20250088361A1

公开(公告)日：2025-03-13

申请号：US18954131

申请日：2024-11-20

Applicant: Intel Corporation

Inventor： Samuel HUI ,  Jayant MANGALAMPALLI ,  Fulton LI ,  Ching Yu LO

IPC: H04L9/32 ,  H04L9/08

Abstract: Examples described herein relate to an apparatus comprising: multiple processors and circuitry coupled to the multiple processors, wherein at least one of the multiple processors comprises multiple cores and wherein the circuitry is to provide the multiple processors with access to at least two firmware Trusted Platform Module (TPM) instances. At least two firmware TPM instances of the firmware TPM instances is to apply cryptography to store information for platform authentication and wherein the information for platform authentication comprises one or more of: user credentials, passwords, certificates, encryption keys, shared secrets, state information, or hash data.

公开(公告)号：US20240303343A1

公开(公告)日：2024-09-12

申请号：US18666693

申请日：2024-05-16

Applicant: Intel Corporation

Inventor： Yi ZENG ,  Russell J. WUNDERLICH ,  Janusz JURSKI ,  Lumin ZHANG ,  Kasper WSZOLEK ,  Jeanne GUILLORY ,  Ching Yu LO ,  Teresa C. HERRICK ,  Richard Marian THOMAIYAR

IPC: G06F21/57 ,  G06F1/06

CPC classification number: G06F21/575 ,  G06F1/06 ,  G06F21/572

Abstract: Examples described herein relate to multiple processor sockets comprising processors connected thereto and first circuitry. The first circuitry is to: based on a first mode of operation: configure the multiple processor sockets to operate with a single memory address space and share interfaces and based on a second mode of operation: configure the interfaces accessible to the multiple processor sockets to provide isolated communications to processor sockets in different partitions and configure the multiple processor sockets to operate in independent memory address spaces.