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公开(公告)号:US20240303343A1
公开(公告)日:2024-09-12
申请号:US18666693
申请日:2024-05-16
Applicant: Intel Corporation
Inventor: Yi ZENG , Russell J. WUNDERLICH , Janusz JURSKI , Lumin ZHANG , Kasper WSZOLEK , Jeanne GUILLORY , Ching Yu LO , Teresa C. HERRICK , Richard Marian THOMAIYAR
CPC classification number: G06F21/575 , G06F1/06 , G06F21/572
Abstract: Examples described herein relate to multiple processor sockets comprising processors connected thereto and first circuitry. The first circuitry is to: based on a first mode of operation: configure the multiple processor sockets to operate with a single memory address space and share interfaces and based on a second mode of operation: configure the interfaces accessible to the multiple processor sockets to provide isolated communications to processor sockets in different partitions and configure the multiple processor sockets to operate in independent memory address spaces.