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    Adaptive processor resource utilization
    1.
    发明授权
    Adaptive processor resource utilization 有权

    公开(公告)号：US11734204B2

    公开(公告)日：2023-08-22

    申请号：US16825538

    申请日：2020-03-20

    Applicant: Intel Corporation

    Inventor： Gang Cao ,  James R. Harris ,  Ziye Yang ,  Vishal Verma ,  Changpeng Liu ,  Chong Han ,  Benjamin Walker

    IPC: G06F13/16 ,  G06F9/50

    CPC classification number: G06F13/1668 ,  G06F9/5027

    Abstract: Examples herein relate to polling for input/output transactions of a network interface or a storage device, or any peripheral device. Some examples monitor clock cycles spent checking for a presence of input/output (I/O) events and processing I/O events and monitor clock cycles spent checking for presence of I/O events without completing an I/O event. Central processing unit (CPU) core utilization can be based on clock cycles spent checking for a presence of I/O events and processing I/O events and clock cycles spent checking for presence of I/O events without completion of an I/O event. For example, if core utilization is below a threshold, frequency of the core can be reduced for performing polling of I/O events. If core utilization is at or above the threshold, frequency of the core can be increased used to performing polling of I/O events.

    Networked shuffle storage
    2.
    发明授权
    Networked shuffle storage 有权

    公开(公告)号：US11194522B2

    公开(公告)日：2021-12-07

    申请号：US16634436

    申请日：2017-08-16

    Applicant: Intel Corporation

    Inventor： Xiao Hu ,  Huan Zhou ,  Sujoy Sen ,  Anjaneya R. Chagam Reddy ,  Mohan J. Kumar ,  Chong Han

    IPC: G06F3/06 ,  G06F16/23

    Abstract: Apparatuses for computing are disclosed herein. An apparatus may include a set of data reduction modules to perform data reduction operations on sets of (key, value) data pairs to reduce an amount of values associated with a shared key, wherein the (key, value) data pairs are stored in a plurality of queues located in a plurality of solid state drives remote from the apparatus. The apparatus may further include a memory access module, communicably coupled to the set of data reduction modules, to directly transfer individual ones of the sets of queued (key, value) data pairs from the plurality of remote solid state drives through remote random access of the solid state drives, via a network, without using intermediate staging storage. Other embodiments may be disclosed or claimed.

    NETWORKED SHUFFLE STORAGE
    3.
    发明申请
    NETWORKED SHUFFLE STORAGE 审中-公开

    公开(公告)号：US20200210114A1

    公开(公告)日：2020-07-02

    申请号：US16634436

    申请日：2017-08-16

    Applicant: Intel Corporation

    Inventor： Xiao Hu ,  Huan Zhou ,  Sujoy Sen ,  Anjaneya R. Chagam Reddy ,  Mohan J. Kumar ,  Chong Han

    IPC: G06F3/06 ,  G06F16/23

    Abstract: Apparatuses for computing are disclosed herein. An apparatus may include a set of data reduction modules to perform data reduction operations on sets of (key, value) data pairs to reduce an amount of values associated with a shared key, wherein the (key, value) data pairs are stored in a plurality of queues located in a plurality of solid state drives remote from the apparatus. The apparatus may further include a memory access module, communicably coupled to the set of data reduction modules, to directly transfer individual ones of the sets of queued (key, value) data pairs from the plurality of remote solid state drives through remote random access of the solid state drives, via a network, without using intermediate staging storage. Other embodiments may be disclosed or claimed.

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