公开(公告)号：US12153962B2

公开(公告)日：2024-11-26

申请号：US16849915

申请日：2020-04-15

Applicant: Intel Corporation

Inventor： Ziye Yang ,  James R. Harris ,  Kiran Patil ,  Benjamin Walker ,  Sudheer Mogilappagari ,  Yadong Li ,  Mark Wunderlich ,  Anil Vasudevan

IPC: G06F9/50 ,  G06F9/46 ,  G06F9/54 ,  G06F13/22 ,  H04L67/1097 ,  H04L69/16

Abstract: The disclosure concerns at least one processor that can execute a polling group to poll for storage transactions associated with a first group of one or more particular queue identifiers. The disclosure concerns at least one processor is configured to: execute a second polling group on a second processor, wherein the second polling group is to poll for storage transactions for a second group of one or more particular queue identifiers that are different than the one or more particular queue identifiers of the first group, wherein the second group of one or more particular queue identifiers are associated with one or more queues that can be accessed using the second polling group and not the first polling group.

公开(公告)号：US20240241847A1

公开(公告)日：2024-07-18

申请号：US18619778

申请日：2024-03-28

Applicant: Intel Corporation

Inventor： Min Zhang ,  Di Pei ,  Gang Cao ,  Changpeng Liu ,  Ziye Yang

IPC: G06F13/28 ,  G06F13/16

CPC classification number: G06F13/28 ,  G06F13/1668 ,  G06F2213/2806

Abstract: A network interface device includes a port with protocol circuitry to couple to a host device by a link compliant with a Compute Express Link (CXL) protocol. The network interface device further includes a memory and logic to support emulation of a file system by the host device of at least a portion of the memory, where the link is used for direct memory accesses for requests or responses associated with the emulation of the file system.

公开(公告)号：US11809890B2

公开(公告)日：2023-11-07

申请号：US17041723

申请日：2018-06-29

Applicant: INTEL CORPORATION

Inventor： Ziye Yang

IPC: G06F9/455 ,  H04L9/40

CPC classification number: G06F9/45558 ,  H04L63/1425 ,  G06F2009/45583 ,  G06F2009/45587 ,  G06F2009/45595

Abstract: Various systems and methods for managing quality of storage service in a virtual network are described herein. A system for managing quality of service in a virtual network includes an analytic platform configured to analyze input/output operations by a virtual host on a storage array in a virtual network, the virtual host identified with a virtual network identifier (VNI), and the virtual network identified by a virtual host address (VHA); and a security controller to: receive, from the analytic platform, storage array metrics associated with the VNI and the VHA; determine that the storage array metrics violate a threshold condition; and cause a responsive action to adjust the operating environment of the virtual host to maintain quality of input/output service for hosts sharing the storage array.

公开(公告)号：US12050813B2

公开(公告)日：2024-07-30

申请号：US17874237

申请日：2022-07-26

Applicant: Intel Corporation

Inventor： Gang Cao ,  Ziye Yang ,  Xiaodong Liu ,  Changpeng Liu

IPC: G06F3/06 ,  G06F9/455

CPC classification number: G06F3/0664 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/45558 ,  G06F2009/45579

Abstract: An apparatus is described. The apparatus includes an accelerator to be coupled to a memory region that the accelerator shares with a virtualization environment comprising a guest OS, a guest VM and an SSD device driver. The accelerator is to forward a submission queue doorbell setting made by the SSD device driver in the shared memory to a corresponding submission queue doorbell in an SSD controller.

公开(公告)号：US11936571B2

公开(公告)日：2024-03-19

申请号：US17981255

申请日：2022-11-04

Applicant: Intel Corporation

Inventor： Shaopeng He ,  Cunming Liang ,  Jiang Yu ,  Ziye Yang ,  Ping Yu ,  Bo Cui ,  Jingjing Wu ,  Liang Ma ,  Hongjun Ni ,  Zhiguo Wen ,  Changpeng Liu ,  Anjali Singhai Jain ,  Daniel Daly ,  Yadong Li

IPC: H04L49/9057 ,  H04L1/1829 ,  H04L47/34 ,  H04L47/56 ,  H04L49/552 ,  H04L49/90

CPC classification number: H04L49/9057 ,  H04L1/1841 ,  H04L47/34 ,  H04L47/56 ,  H04L49/552 ,  H04L49/9094

Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

公开(公告)号：US11734204B2

公开(公告)日：2023-08-22

申请号：US16825538

申请日：2020-03-20

Applicant: Intel Corporation

Inventor： Gang Cao ,  James R. Harris ,  Ziye Yang ,  Vishal Verma ,  Changpeng Liu ,  Chong Han ,  Benjamin Walker

IPC: G06F13/16 ,  G06F9/50

CPC classification number: G06F13/1668 ,  G06F9/5027

Abstract: Examples herein relate to polling for input/output transactions of a network interface or a storage device, or any peripheral device. Some examples monitor clock cycles spent checking for a presence of input/output (I/O) events and processing I/O events and monitor clock cycles spent checking for presence of I/O events without completing an I/O event. Central processing unit (CPU) core utilization can be based on clock cycles spent checking for a presence of I/O events and processing I/O events and clock cycles spent checking for presence of I/O events without completion of an I/O event. For example, if core utilization is below a threshold, frequency of the core can be reduced for performing polling of I/O events. If core utilization is at or above the threshold, frequency of the core can be increased used to performing polling of I/O events.

公开(公告)号：US11422750B2

公开(公告)日：2022-08-23

申请号：US16643470

申请日：2017-09-27

Applicant: INTEL CORPORATION

Inventor： Ziye Yang ,  Gang Cao ,  Cunyin Chang ,  Changpeng Liu ,  James Harris

IPC: G06F3/06 ,  G06F9/50

Abstract: A computer program product, system, and method to manage access to storage resources from multiple applications. A plurality of virtual controllers is generated in a host memory space. Each virtual controller includes at least one virtual namespace that maps to a physical namespace in a physical controller. Applications are assigned to the virtual controllers. For each application of the applications assigned one of the virtual controllers, a virtual submission queue is generated to communicate with the virtual controller assigned to the application. An Input/Output (I/O) request to a target virtual namespace in one of the virtual submission queues is added to a physical submission queue for the physical controller having the physical namespace for which the target virtual namespace was generated.

公开(公告)号：US20220244999A1

公开(公告)日：2022-08-04

申请号：US17724764

申请日：2022-04-20

Applicant: Intel Corporation

Inventor： Ned Smith ,  Changzheng Wei ,  Songwu Shen ,  Ziye Yang ,  Junyuan Wang ,  Weigang Li ,  Wenqian Yu

IPC: G06F9/50 ,  G06F21/76

Abstract: Technologies for hybrid field-programmable gate array (FPGA) application-specific integrated circuit (ASIC) code acceleration are described. In one example, the computing device includes a FPGA comprising: algorithm circuitry to: perform one or more algorithm tasks of an algorithm, wherein the algorithm to perform a service request that is offloaded to the FPGA; and determine a primitive task associated with an algorithm task of the one or more algorithm tasks; primitive offload circuitry to encapsulate the primitive task in a buffer of the FPGA, wherein the buffer is accessible by an ASIC of the computing device; and result circuitry to return one or more results of the service request responsive to performance of the primitive task by the ASIC.

公开(公告)号：US11748278B2

公开(公告)日：2023-09-05

申请号：US16827460

申请日：2020-03-23

Applicant: Intel Corporation

Inventor： Ziye Yang ,  Changpeng Liu ,  Gang Cao ,  Qun Wan

IPC: G06F13/16 ,  G06F12/10

CPC classification number: G06F13/1668 ,  G06F12/10

Abstract: Examples described herein relate to executing a poller to poll for received communications over multiple transport layer protocols from a connection to identify a received communication from one of the multiple transport layer protocols and identify a second received communication from a different one of the multiple transport layer protocols. A change to the different one of the multiple transport layer protocols occurs in response to failure of the one of the multiple transport layer protocols or slow transport rate using the one of the multiple transport layer protocols. In some examples, the poller is executed in user space and transport layer protocol processing of the received communication and second received communication occur in kernel space.

公开(公告)号：US11507404B2

公开(公告)日：2022-11-22

申请号：US16464625

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Ziye Yang

IPC: G06F9/455 ,  G06F9/54 ,  G06F15/173 ,  H04L12/46 ,  H04L69/16 ,  H04L69/163

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to receive a remote direct memory access (RDMA) message from a first virtual machine located on a first network element, determine that the RDMA message is destined for a second virtual machine that is located on the first network element, and use a local direct memory access engine to process the RDMA message, where the local direct memory access engine is located on the first network element. In an example, the electronic device can be further configured to determine that the RDMA message is destined for a third virtual machine on a second network element, wherein the second network element is different than the first network element and use an other device acceleration driver to process the RDMA message instead of the local direct memory access engine.