公开(公告)号：US20210210385A1

公开(公告)日：2021-07-08

申请号：US17211757

申请日：2021-03-24

Applicant: Intel Corporation

Inventor： Abhijit Jayant PETHE ,  Tahir GHANI ,  Mark BOHR ,  Clair WEBB ,  Harry GOMEZ ,  Annalisa CAPPELLANI

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28 ,  H01L21/311 ,  H01L23/522 ,  H01L23/532

Abstract: Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate.

公开(公告)号：US20190115257A1

公开(公告)日：2019-04-18

申请号：US16219795

申请日：2018-12-13

Applicant: Intel Corporation

Inventor： Abhijit Jayant PETHE ,  Tahir GHANI ,  Mark BOHR ,  Clair WEBB ,  Harry GOMEZ ,  Annalisa CAPPELLANI

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L23/522 ,  H01L23/532

Abstract: Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate.