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1.发明申请GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO IMPLEMENT FLOW CONTROL 审中-公开一般输入/输出结构，协议和相关方法实施流量控制公开(公告)号：US20150178241A1
公开(公告)日：2015-06-25
申请号：US14580073
申请日：2014-12-22
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
Abstract translation: 提出了一种增强的通用输入/输出通信架构，协议和相关方法。
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2.发明授权公开(公告)号：US09088495B2
公开(公告)日：2015-07-21
申请号：US13730061
申请日：2012-12-28
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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3.发明授权公开(公告)号：US09836424B2
公开(公告)日：2017-12-05
申请号：US14144309
申请日：2013-12-30
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: G06F13/4068 , A47K7/028 , G06F13/4273 , G06F2213/0026
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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4.发明授权公开(公告)号：US09736071B2
公开(公告)日：2017-08-15
申请号：US14580073
申请日：2014-12-22
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
IPC: G06F3/00 , H04L12/801 , G06F13/12 , G06F13/38 , G06F13/42 , G06F13/40 , G06F5/06 , H04L12/835
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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5.发明授权公开(公告)号：US09602408B2
公开(公告)日：2017-03-21
申请号：US14144320
申请日：2013-12-30
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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Patent Agency Ranking
6.发明授权公开(公告)号：US09071528B2
公开(公告)日：2015-06-30
申请号：US13730024
申请日：2012-12-28
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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7.发明授权公开(公告)号：US09049125B2
公开(公告)日：2015-06-02
申请号：US13729953
申请日：2012-12-28
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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8.发明申请公开(公告)号：US20140304448A9
公开(公告)日：2014-10-09
申请号：US14144309
申请日：2013-12-30
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
IPC: G06F13/40
CPC classification number: G06F13/4068 , A47K7/028 , G06F13/4273 , G06F2213/0026
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
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9.发明授权General input/output architecture with PCI express protocol with credit-based flow control 有权具有基于信用流量控制的PCI Express协议的一般输入/输出架构公开(公告)号：US08819306B2
公开(公告)日：2014-08-26
申请号：US13729673
申请日：2012-12-28
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
IPC: G06F13/00
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
Abstract translation: 提出了一种增强的通用输入/输出通信架构，协议和相关方法。
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10.发明申请GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO IMPLEMENT FLOW CONTROL 审中-公开一般输入/输出结构，协议和相关方法实施流量控制公开(公告)号：US20140189174A1
公开(公告)日：2014-07-03
申请号：US14144320
申请日：2013-12-30
Applicant: Intel Corporation
Inventor： Jasmin Ajanovic , David Harriman , Blaise Fanning , David Lee
IPC: G06F13/42
CPC classification number: H04L47/10 , G06F5/06 , G06F13/124 , G06F13/385 , G06F13/4059 , G06F13/42 , G06F13/4221 , G06F13/4252 , G06F13/4265 , G06F13/4269 , G06F13/4282 , H04L47/30
Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
Abstract translation: 提出了一种增强的通用输入/输出通信架构，协议和相关方法。
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