公开(公告)号：US20220360359A1

公开(公告)日：2022-11-10

申请号：US17869370

申请日：2022-07-20

Applicant: Intel Corporation

Inventor： Alon MEISLER ,  Ehud SHOOR ,  Amir MEZER ,  Tsion VIDAL

IPC: H04K1/04

Abstract: Examples described herein relate to a network interface device that includes first circuitry to perform a first scrambling operation on input data; second circuitry to perform a second scrambling operation on the input data; and third circuitry to select the second scrambled input data based on the first scrambled input data including a data sequence that is associated with receiver malfunction and the second scrambled input data including the data sequence that is associated with receiver malfunction.

公开(公告)号：US20170366468A1

公开(公告)日：2017-12-21

申请号：US15465396

申请日：2017-03-21

Applicant: Intel Corporation

Inventor： Ehud SHOOR ,  Ari SHARON

IPC: H04L12/863 ,  H04L1/00 ,  H04L7/033 ,  H04L25/03

CPC classification number: H04L47/6245 ,  G06F1/04 ,  G06F13/40 ,  H04B15/00 ,  H04L1/0018 ,  H04L25/03273 ,  H04L49/90

Abstract: Described is a low latency re-timer for systems supporting spread spectrum clocking. The re-timer comprises: a first clock frequency estimator to estimate a frequency of a receive clock (RX CLK) and to provide a first timestamp associated with a first clock that underwent spread spectrum; a second clock frequency estimator to estimate a frequency of a transmit clock (TX CLK) and to provide a second timestamp associated with a second clock that underwent spread spectrum; and a comparator to compare the first timestamp with the second timestamp.