公开(公告)号：US20180004688A1

公开(公告)日：2018-01-04

申请号：US15201370

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Emily CHUNG ,  Frank T. HADY ,  George VERGIS

IPC: G06F13/16 ,  G11C11/4076 ,  G06F13/42 ,  G11C11/4093 ,  G06F13/40

CPC classification number: G06F13/1673 ,  G06F13/4068 ,  G06F13/42 ,  G11C7/1066 ,  G11C11/4076 ,  G11C11/4093 ,  G11C16/32 ,  G11C2207/2254

Abstract: A storage circuit includes a buffer coupled between the storage controller and the nonvolatile memory devices. The circuit includes one or more groups of nonvolatile memory (NVM) devices, a storage controller to control access to the NVM device, and the buffer. The buffer is coupled between the storage controller and the NVM devices. The buffer is to re-drive signals on a bus between the NVM devices and the storage controller, including synchronizing the signals to a clock signal for the signals. The circuit can include a data buffer, a command buffer, or both.