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公开(公告)号：US20230315460A1
公开(公告)日：2023-10-05
申请号：US17712129
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
IPC: G06F9/30
CPC classification number: G06F9/3016 , G06F9/3009 , G06F9/30094
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315572A1
公开(公告)日：2023-10-05
申请号：US17712121
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
CPC classification number: G06F11/1405 , G06F9/3861 , G06F15/7889 , G06F9/3009 , G06F9/226
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315459A1
公开(公告)日：2023-10-05
申请号：US17712122
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
IPC: G06F9/30
CPC classification number: G06F9/3016 , G06F9/3009 , G06F9/3013
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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Patent Agency Ranking
公开(公告)号：US20230315445A1
公开(公告)日：2023-10-05
申请号：US17712126
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
CPC classification number: G06F9/223 , G06F9/30101 , G06F9/3009
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315462A1
公开(公告)日：2023-10-05
申请号：US17712127
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
CPC classification number: G06F9/3017 , G06F9/223 , G06F9/3009
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315461A1
公开(公告)日：2023-10-05
申请号：US17712130
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
IPC: G06F9/30
CPC classification number: G06F9/3016 , G06F9/3009
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315444A1
公开(公告)日：2023-10-05
申请号：US17712124
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
CPC classification number: G06F9/223 , G06F9/3017 , G06F9/30101
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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公开(公告)号：US20230315455A1
公开(公告)日：2023-10-05
申请号：US17712118
申请日：2022-04-02
Applicant: Intel Corporation
Inventor： David B. SHEFFIELD , Erich BOLEYN , Jonathan PEARCE , Sofia PEDIADITAKI , Jeffrey COOK , Shreesha SRINATH , Ching-Kai LIANG , Tyler SONDAG
IPC: G06F9/30
CPC classification number: G06F9/3009 , G06F9/30105 , G06F9/30043 , G06F9/30047
Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
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