Optical device including buried optical waveguides and output couplers

    公开(公告)号:US10996408B2

    公开(公告)日:2021-05-04

    申请号:US16517159

    申请日:2019-07-19

    申请人: Intel Corporation

    IPC分类号: G02B6/42 G02B6/12 G02B6/122

    摘要: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.

    OPTICAL DEVICE INCLUDING BURIED OPTICAL WAVEGUIDES AND OUTPUT COUPLERS

    公开(公告)号:US20190339466A1

    公开(公告)日:2019-11-07

    申请号:US16517159

    申请日:2019-07-19

    申请人: Intel Corporation

    IPC分类号: G02B6/42

    摘要: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.