III-N multichip modules and methods of fabrication

    公开(公告)号:US11211245B2

    公开(公告)日:2021-12-28

    申请号:US16890937

    申请日:2020-06-02

    申请人: Intel Corporation

    摘要: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

    OPTICAL RECEIVER EMPLOYING A METASURFACE COLLECTION LENS

    公开(公告)号:US20190044003A1

    公开(公告)日:2019-02-07

    申请号:US15927391

    申请日:2018-03-21

    申请人: Intel Corporation

    摘要: In embodiments, an optoelectronic apparatus may include a substrate with a first side and a second side opposite the first side; a photodetector disposed on the first side of the substrate, the photodetector to convert a light signal into an electrical signal; and a dielectric metasurface lens etched into the second side of the substrate, the dielectric metasurface lens to collect incident light and focus it through the substrate onto the photodetector.

    OPTICAL MODE CONVERTOR
    5.
    发明公开

    公开(公告)号:US20240184048A1

    公开(公告)日:2024-06-06

    申请号:US18496672

    申请日:2023-10-27

    申请人: Intel Corporation

    IPC分类号: G02B6/14 G02B6/122

    摘要: Embodiments relate to an apparatus that includes: an input stage with an input Si slab height, an input Si waveguide height, and an input height difference between the input Si slab height and the input Si waveguide height; an output stage with an output Si slab height that is different from the input Si slab height, an output Si waveguide height that is different from the input Si waveguide height, and an output height difference between the output Si slab height and the output Si waveguide height that is different from the input height difference; and a transition stage positioned between the input stage and the output stage, wherein the transition stage has a transition Si slab height, a transition Si waveguide height, and a transition height difference between the transition Si slab height and the transition Si waveguide height. Other embodiments may be described and/or claimed.

    WAVEGUIDE PHOTODETECTORS FOR SILICON PHOTONIC INTEGRATED CIRCUITS

    公开(公告)号:US20220416097A1

    公开(公告)日:2022-12-29

    申请号:US17358921

    申请日:2021-06-25

    申请人: Intel Corporation

    摘要: A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.

    TECHNOLOGIES FOR SILICON DIFFRACTION GRATINGS

    公开(公告)号:US20220390654A1

    公开(公告)日:2022-12-08

    申请号:US17561781

    申请日:2021-12-24

    申请人: Intel Corporation

    IPC分类号: G02B5/18

    摘要: Technologies for silicon diffraction gratings are disclosed. In some embodiments, grating lines of the diffraction gratings may have several sub-lines that make up each grating line of the diffraction grating. The sub-lines may be sub-wavelength features. In some embodiments, several silicon diffraction gratings may be made from a wafer, such as a wafer with a diameter of 300 millimeters. The wafer may be etched precisely across the entire wafer, leading to a high yield of the diffraction gratings.

    Optical coupler
    10.
    发明授权
    Optical coupler 有权
    光耦合器

    公开(公告)号:US09348099B2

    公开(公告)日:2016-05-24

    申请号:US14335756

    申请日:2014-07-18

    申请人: Intel Corporation

    IPC分类号: G02B6/12 G02B6/42

    摘要: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler. In some embodiments, the device may include an optical waveguide to transmit light input from a light source. The optical waveguide may include a semiconductor layer, having a trench with one facet that comprises an edge formed under an approximately 45 degree angle and another facet formed substantially normal to the semiconductor layer. The edge may interface with another medium to form a mirror to receive inputted light and reflect received light substantially perpendicularly to propagate the received light. Other embodiments may be described and/or claimed.

    摘要翻译: 本公开的实施例涉及用于光耦合器的技术和配置。 在一些实施例中,该装置可以包括用于透射从光源输入的光的光波导。 光波导可以包括具有一个沟槽的半导体层,该沟槽包括形成在大约45度角的边缘,以及基本垂直于半导体层形成的另一个小面。 边缘可以与另一介质接合以形成反射镜以接收输入的光并且基本垂直地反射接收的光以传播接收到的光。 可以描述和/或要求保护其他实施例。