公开(公告)号：US20250028532A1

公开(公告)日：2025-01-23

申请号：US18375488

申请日：2023-09-30

Applicant: Intel Corporation

Inventor： Jason AGRON ,  Andreas KLEEN ,  Ching-Tsun CHOU ,  Jonathan COMBS ,  Hongjiu LU ,  Jared Warner STARK, IV ,  Jeff WIEDEMEIER

IPC: G06F9/30

Abstract: Techniques for performing an unconditional jump are described. In some examples, an instruction is processed to perform the unconditional jump. In some examples, the instruction is to at least include one or more fields for an opcode and a 64-bit bit immediate, wherein the 64-bit immediate is to encode an absolute address and the opcode is to indicate execution circuitry is jump to the absolute address.

公开(公告)号：US20200210320A1

公开(公告)日：2020-07-02

申请号：US16235489

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Beeman STRONG ,  Matthew C. MERTEN ,  Jason AGRON

IPC: G06F11/36

Abstract: A method for tracing software code executing on a core of a processor is described. The method includes generating a set of packets for a trace packet stream based on a main cycle counter, which maintains a count of cycles elapsing in the core since a packet was emitted into the trace packet stream, and a commit cycle counter, which maintains a cycle count in the core since the last commit operation, wherein the generating comprises (1) storing a value of the main cycle counter in the commit cycle counter in response to detecting a commit operation and (2) storing a value of the commit cycle counter in the main cycle counter in response to detecting an abort in the core; and emitting the set of packets from the processor into the trace packet stream for tracing execution of the software code.