公开(公告)号：US20240188222A1

公开(公告)日：2024-06-06

申请号：US18060595

申请日：2022-12-01

Applicant: Intel Corporation

Inventor： Rahul MANEPALLI ,  Srinivas PIETAMBARAM ,  Darko GRUJICIC ,  Marcel WALL ,  Jason STEILL

IPC: H05K3/22 ,  H05K1/03 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K3/225 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/002 ,  H05K3/0029 ,  H01L21/486

Abstract: The present disclosure is directed to a method providing a substrate core having a glass core layer with top and bottom surfaces and a build-up process performing operations to form a plurality of through-glass vias formed through the glass core layer and a plurality of conductive layers on the top and bottom surfaces of the glass core layer. As an integral part of the build-up process, a defect detection method may be used to detect defects in the glass core layer. The inspection for defects may be performed after selected operations. After one or more defect (e.g., crack) is uncovered, a repair process may be performed to repair the defects in the glass core layer. The repair of a defect may be performed immediately upon detection or after selected operations as a comprehensive repair of a group of defects.