公开(公告)号：US11935151B2

公开(公告)日：2024-03-19

申请号：US17859984

申请日：2022-07-07

Applicant: Intel Corporation

Inventor： James E. Akiyama ,  John Howard ,  Murali Ramadoss ,  Gary K. Smith ,  Todd M. Witter ,  Satish Ramanathan ,  Zhengmin Li

IPC: G09G5/36 ,  G06T1/20 ,  G09G5/14

CPC classification number: G06T1/20 ,  G09G5/14 ,  G09G5/363 ,  G09G2360/06 ,  G09G2360/08 ,  G09G2360/18

Abstract: Examples described herein relate to a graphics processing system that includes one or more integrated graphics systems and one or more discrete graphics systems. In some examples, an operating system (OS) or other software supports switching between image display data being provided from either an integrated graphics system or a discrete graphics system by configuring a multiplexer at runtime to output image data to a display. In some examples, a multiplexer is not used and interface supported messages are used to transfer image data from an integrated graphics system to a discrete graphics system and the discrete graphics system generates and outputs image data to a display. In some examples, interface supported messages are used to transfer image data from a discrete graphics system to an integrated graphics system and the integrated graphics system uses an overlay process to generate a composite image for output to a display.

公开(公告)号：US11410264B2

公开(公告)日：2022-08-09

申请号：US16586855

申请日：2019-09-27

Applicant: Intel Corporation

Inventor： James E. Akiyama ,  John Howard ,  Murali Ramadoss ,  Gary K. Smith ,  Todd M. Witter ,  Satish Ramanathan ,  Zhengmin Li

IPC: G09G5/36 ,  G06T1/20 ,  G09G5/14

Abstract: Examples described herein relate to a graphics processing system that includes one or more integrated graphics systems and one or more discrete graphics systems. In some examples, an operating system (OS) or other software supports switching between image display data being provided from either an integrated graphics system or a discrete graphics system by configuring a multiplexer at runtime to output image data to a display. In some examples, a multiplexer is not used and interface supported messages are used to transfer image data from an integrated graphics system to a discrete graphics system and the discrete graphics system generates and outputs image data to a display. In some examples, interface supported messages are used to transfer image data from a discrete graphics system to an integrated graphics system and the integrated graphics system uses an overlay process to generate a composite image for output to a display.

公开(公告)号：US20210318975A1

公开(公告)日：2021-10-14

申请号：US17356595

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Aruni Nelson ,  Abdul Ismail ,  John Howard

IPC: G06F13/38 ,  G06F13/42 ,  G06F13/40

Abstract: In one embodiment, an apparatus includes: a converter to receive and convert single-ended data to differential data, and receive and convert a single-ended clock signal to a differential clock signal; a multiplexer coupled to the converter to receive the differential data and the differential clock signal; and a controller coupled to the multiplexer. In response to an indication that a device coupled to the apparatus is capable of an alternate mode, the controller is to configure the multiplexer to send the differential data on at least one of a plurality of differential pairs of data lanes. Other embodiments are described and claimed.

公开(公告)号：US20200218505A1

公开(公告)日：2020-07-09

申请号：US16819772

申请日：2020-03-16

Applicant: INTEL CORPORATION

Inventor： John Howard ,  Steven B. McGowan ,  Krzysztof Perycz

IPC: G06F5/06 ,  G06F13/28 ,  G06F13/16 ,  G06F13/40 ,  G06F5/14

Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.

公开(公告)号：US10592205B2

公开(公告)日：2020-03-17

申请号：US16182932

申请日：2018-11-07

Applicant: INTEL CORPORATION

Inventor： John Howard ,  Steven B. McGowan ,  Krzysztof Perycz

IPC: G06F5/06 ,  G06F13/28 ,  G06F13/16 ,  G06F13/40 ,  G06F5/14

Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.

公开(公告)号：US20250004966A1

公开(公告)日：2025-01-02

申请号：US18345748

申请日：2023-06-30

Applicant: Intel Corporation

Inventor： Huimin Chen ,  James Akiyama ,  John Howard ,  Venkataramani Gopalakrishnan ,  Nirmala Bailur

IPC: G06F13/38 ,  G06F13/40

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to route display stream data. An example system disclosed herein to route display stream data includes a circuit board comprising decoding circuitry to decode Peripheral Component Interconnect Express (PCIe) data packets into a display port stream data, the PCIe data packets encoded by a discrete graphics circuitry, and a Universal Serial Bus (USB) connector on the circuit board coupled to the decoding circuitry, wherein the USB connector is to output the display port stream data.

公开(公告)号：US11074042B2

公开(公告)日：2021-07-27

申请号：US16819772

申请日：2020-03-16

Applicant: INTEL CORPORATION

Inventor： John Howard ,  Steven B. McGowan ,  Krzysztof Perycz

IPC: G06F5/06 ,  G06F13/28 ,  G06F13/16 ,  G06F13/40 ,  G06F5/14

Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.

公开(公告)号：US20190042483A1

公开(公告)日：2019-02-07

申请号：US15941273

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Darren Abramson ,  David Hines ,  Alberto Martinez ,  Adeel Aslam ,  John Howard ,  Shanthanand R. Kutuva ,  Karthi R. Vadivelu ,  Kar Leong Wong ,  Satheesh Chellappan

IPC: G06F13/10 ,  G06F13/38

CPC classification number: G06F13/102 ,  G06F13/385 ,  G06F2209/509 ,  G06F2213/0042

Abstract: An example apparatus includes: a host controller offload capability detector to determine that a media stream offload capability is available in the peripheral interface host controller; a media stream offload arbiter to send a media stream offload request to a media processor manager based on the media stream offload capability and based on a peripheral device being connected to the peripheral interface host controller; and an endpoint mapper to generate an endpoint table entry corresponding to the peripheral device, the endpoint table entry to assign a first communication interface of the peripheral interface host controller to transfer a media stream corresponding to the peripheral device between the media processor and the peripheral interface host controller without the media stream being routed to an application processor that is in circuit with the peripheral interface host controller and in circuit with the media processor.

公开(公告)号：US10127012B2

公开(公告)日：2018-11-13

申请号：US15039934

申请日：2013-12-27

Applicant: INTEL CORPORATION

Inventor： John Howard ,  Steven B. McGowan ,  Krzysztof Perycz

IPC: G06F13/00 ,  G06F5/06 ,  G06F13/28 ,  G06F13/16 ,  G06F13/40 ,  G06F5/14

Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.

公开(公告)号：US11561765B2

公开(公告)日：2023-01-24

申请号：US17384496

申请日：2021-07-23

Applicant: Intel Corporation

Inventor： John Howard ,  Steven B. McGowan ,  Krzysztof Perycz

IPC: G06F5/06 ,  G06F13/28 ,  G06F13/16 ,  G06F13/40 ,  G06F5/14

Abstract: An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.