公开(公告)号：US11271578B2

公开(公告)日：2022-03-08

申请号：US17059495

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Albert Molina ,  Kameran Azadet ,  Matteo Camponeschi ,  Jose Luis Ceballos ,  Christian Lindholm

IPC: H03M1/12 ,  H03M1/06 ,  H03M1/10

Abstract: A time-interleaved Analog-to-Digital Converter, ADC, system is provided. The time-inter-leaved ADC system includes time-interleaved first and second ADC circuits and a switching circuit. The switching circuit is configured to selectively supply an analog input signal for digitization to at least one of the first ADC circuit, the second ADC circuit or ground, and to selectively supply an analog calibration signal to at least one of the first ADC circuit, the second ADC circuit or ground. Further, the time-interleaved ADC system includes an output circuit configured to selectively generate, based on least one of a first digital signal output by the first ADC circuit and a second digital signal output by the second ADC circuit, a digital output signal.

公开(公告)号：US10601434B1

公开(公告)日：2020-03-24

申请号：US16369237

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Albert Molina ,  Kameran Azadet ,  Matteo Camponeschi ,  Jose Luis Ceballos ,  Christian Lindholm ,  Hundo Shin ,  Martin Clara

IPC: H03M1/10 ,  H04B1/16 ,  H04W88/08

Abstract: An apparatus for calibrating a time-interleaved analog-to-digital converter including a plurality of time-interleaved analog-to-digital converter circuits is provided. The apparatus includes an analog signal generation circuit configured to generate an analog calibration signal based on a digital calibration signal representing one or more digital data sequences for calibration. The analog calibration signal is a wideband signal. Further, the apparatus includes a coupling circuit configured to controllably couple an input node of the time-interleaved analog-to-digital converter to either the analog signal generation circuit or to a node capable of providing an analog signal for digitization.