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1.
公开(公告)号:US20190034316A1
公开(公告)日:2019-01-31
申请号:US15806917
申请日:2017-11-08
Applicant: Intel Corporation
Inventor: Konstantin Levit-Gurevich , Aleksey Alekseev , Michael Berezalsky , Sion Berkowits , Julia Fedorova , Anton V. Gorshkov , Sunpyo Hong , Noam Itzhaki , Arik Narkis
Abstract: Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.
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2.
公开(公告)号:US20230281104A1
公开(公告)日:2023-09-07
申请号:US18316866
申请日:2023-05-12
Applicant: Intel Corporation
Inventor: Konstantin Levit-Gurevich , Aleksey Alekseev , Michael Berezalsky , Sion Berkowits , Julia Fedorova , Anton V. Gorshkov , Sunpyo Hong , Noam Itzhaki , Arik Narkis
CPC classification number: G06F11/3612 , G06F11/3024 , G06F11/3409 , G06F11/3466 , G06F8/41
Abstract: Disclosed examples include generating instrumented code by inserting profiling instructions at insertion points in code; outputting the instrumented code for execution by second programmable circuitry; and accessing profiling data generated by the second programmable circuitry based on the instrumented code.
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公开(公告)号:US11650902B2
公开(公告)日:2023-05-16
申请号:US15806917
申请日:2017-11-08
Applicant: Intel Corporation
Inventor: Konstantin Levit-Gurevich , Aleksey Alekseev , Michael Berezalsky , Sion Berkowits , Julia Fedorova , Anton V. Gorshkov , Sunpyo Hong , Noam Itzhaki , Arik Narkis
CPC classification number: G06F11/3612 , G06F11/3024 , G06F11/3409 , G06F11/3466 , G06F8/41 , G06F2201/865
Abstract: Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.
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公开(公告)号:US10459705B2
公开(公告)日:2019-10-29
申请号:US15856743
申请日:2017-12-28
Applicant: Intel Corporation
Inventor: Anton V. Gorshkov , Michael Berezalsky , Konstantin Levit-Guervich , Julia Fedorova , Noam Itzhaki , Arik Narkis , Sion Berkowits
Abstract: Systems, apparatuses and methods may provide for technology that receives compiled code and identifies a plurality of blocks in the compiled code. Instrumented code may be generated from the compiled code by modifying the blocks to include probes to measure latencies of the blocks during execution of the instrumented code on a graphics processing unit.
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公开(公告)号:US20190042223A1
公开(公告)日:2019-02-07
申请号:US15856743
申请日:2017-12-28
Applicant: Intel Corporation
Inventor: Anton V. Gorshkov , Michael Berezalsky , Konstantin Levit-Guervich , Julia Fedorova , Noam Itzhaki , Arik Narkis , Sion Berkowits
Abstract: Systems, apparatuses and methods may provide for technology that receives compiled code and identifies a plurality of blocks in the compiled code. Instrumented code may be generated from the compiled code by modifying the blocks to include probes to measure latencies of the blocks during execution of the instrumented code on a graphics processing unit.
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