公开(公告)号：US20230409197A1

公开(公告)日：2023-12-21

申请号：US18239363

申请日：2023-08-29

Applicant: Intel Corporation

Inventor： Kaijie Guo ,  Ashok Raj ,  Ned Smith ,  Weigang Li ,  Junyuan Wang ,  Xin Zeng ,  Brian Will ,  Zijuan Fan ,  Michael E. Kounavis ,  Qianjun Xie ,  Yuan Wang ,  Yao Huo

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0655 ,  G06F3/0673

Abstract: An embodiment of an integrated circuit may comprise memory to store respective resource control descriptors in correspondence with respective identifiers, and an input/output (JO) memory management unit (IOMMU) communicatively coupled to the memory, the IOMMU including circuitry to determine resource control information for an IO transaction based on a resource control descriptor stored in the memory that corresponds to an identifier associated with the IO transaction, and control utilization of one or more resources of the IOMMU based on the determined resource control information. Other embodiments are disclosed and claimed.

公开(公告)号：US20230418773A1

公开(公告)日：2023-12-28

申请号：US18035705

申请日：2020-12-24

Applicant: Intel Corporation

Inventor： Kaijie Guo ,  Xin Zeng ,  Ned Smith ,  Weigang Li ,  Junyuan Wang ,  Songwu Shen ,  Zijuan Fan ,  Yao Huo ,  Maksim Lukoshkov ,  Laurent Coquerel

IPC: G06F13/28

CPC classification number: G06F13/28

Abstract: Techniques and mechanisms for determining an operation to be performed with a direct memory access (DMA) request. An inspection unit (105) is coupled between an input-output memory management unit (IOMMU) (120) and an endpoint device (118). The inspection unit (105) stores a registry (330) comprising entries (332) which each correspond to a respective address, and a respective one or more resources of the endpoint device (118). A given entry (332) of the registry (330) is created based on a message from the IOM MU (120) which indicates the successful completion of an address translation to facilitate a DMA request. The endpoint device (118) performs a search, based on a DMA request, to determine if any registry (330) entry (332) indicates a combination of an address and an endpoint resource, where said combination matches a corresponding combination indicated by the DMA request. Communication of the DMA request to the IOMMU (120) is contingent on a result of the search.

公开(公告)号：US20230216849A1

公开(公告)日：2023-07-06

申请号：US18008743

申请日：2021-07-07

Applicant: Intel Corporation

Inventor： Ned M. Smith ,  Junyuan Wang ,  Kaijie Guo ,  Zijuan Fan ,  Weigang Li ,  Lihui Zhang

IPC: H04L9/40

CPC classification number: H04L63/0884 ,  H04L63/20

Abstract: Various examples of device and system implementations and methods for performing attestation delegation operations are disclosed. In an example, attestation operations are performed by a verifier, including: obtaining endorsement information for attestation of an entity; obtaining an appraisal policy for evaluation of attestation evidence for the attestation of the entity; determining, based on the endorsement information and the appraisal policy, that delegation to a delegate verifier entity is permitted to perform the attestation of the entity; and providing, to the delegate verifier entity, a delegation command to perform the attestation of the entity, wherein the delegation command authorizes the delegate verifier entity to perform attestation operations (e.g., verifier operations) for a domain of entities including the entity.

公开(公告)号：US20200371953A1

公开(公告)日：2020-11-26

申请号：US16989667

申请日：2020-08-10

Applicant: Intel Corporation

Inventor： Kaijie Guo ,  Weigang Li ,  Junyuan Wang ,  Liang Ma ,  Maksim Lukoshkov ,  Yao Huo

IPC: G06F12/1009 ,  H04L29/12 ,  G06F12/1027 ,  G06F13/42 ,  G06F13/28

Abstract: Examples herein relate to a system that includes a first memory device; a second memory device; and an input-output memory management unit (IOMMU). The IOMMU can search for a virtual-to-physical address translation entry in a first table for a received virtual address and based on a virtual-to-physical address translation entry for the received virtual address not being present in the first table, search a second table for a virtual-to-physical address translation entry for the received virtual address, wherein the first table is stored in the first memory device and the second table is stored in the second memory device. In some examples, based on a virtual-to-physical address translation entry for the received virtual address not being present in the second table, a page table walk is performed to determine a virtual-to-physical address translation for the received virtual address. In some examples, the first table includes an IO translation lookaside buffer (IOTLB).

公开(公告)号：US20240320161A1

公开(公告)日：2024-09-26

申请号：US18575832

申请日：2021-08-20

Applicant: Intel Corporation

Inventor： Kaijie Guo ,  Qianjun Xie ,  Weigang Li ,  Junyuan Wang ,  Ashok Raj ,  Zijuan Fan

IPC: G06F12/1045 ,  G06F9/30

CPC classification number: G06F12/1045 ,  G06F9/3016 ,  G06F2212/50

Abstract: Systems, methods, and apparatuses to support a device translation lookaside buffer pre-translation instruction are described. A hardware system includes an input/output device, an input/output memory controller to perform a direct memory access of a memory for the input/output device, and a processor core separate from the input/output device and comprising a decoder circuit to decode a single instruction into a decoded single instruction, the single instruction including one or more fields to identify a virtual address to physical address mapping for the input/output device in the memory, and an opcode to indicate an execution circuit is to store the virtual address to physical address mapping into a translation lookaside buffer within the input/output device, and the execution circuit to execute the decoded single instruction according to the opcode.

公开(公告)号：US11422944B2

公开(公告)日：2022-08-23

申请号：US16989667

申请日：2020-08-10

Applicant: Intel Corporation

Inventor： Kaijie Guo ,  Weigang Li ,  Junyuan Wang ,  Liang Ma ,  Maksim Lukoshkov ,  Yao Huo

IPC: G06F12/1009 ,  H04L61/2596 ,  G06F12/1027 ,  G06F13/28 ,  G06F13/42

Abstract: Examples herein relate to a system that includes a first memory device; a second memory device; and an input-output memory management unit (IOMMU). The IOMMU can search for a virtual-to-physical address translation entry in a first table for a received virtual address and based on a virtual-to-physical address translation entry for the received virtual address not being present in the first table, search a second table for a virtual-to-physical address translation entry for the received virtual address, wherein the first table is stored in the first memory device and the second table is stored in the second memory device. In some examples, based on a virtual-to-physical address translation entry for the received virtual address not being present in the second table, a page table walk is performed to determine a virtual-to-physical address translation for the received virtual address. In some examples, the first table includes an IO translation lookaside buffer (IOTLB).