公开(公告)号：US20210358872A1

公开(公告)日：2021-11-18

申请号：US17387836

申请日：2021-07-28

申请人： Intel Corporation

发明人： Srinivas V. PIETAMBARAM ,  Rahul N. MANEPALLI ,  Kristof Kuwawi DARMAWIKARTA ,  Robert Alan MAY ,  Aleksandar ALEKSOV ,  Telesphor KAMGAING

IPC分类号： H01L23/66 ,  H01L21/56 ,  H01L23/00

摘要： Semiconductor packages having a die electrically connected to an antenna by a coaxial interconnect are described. In an example, a semiconductor package includes a molded layer between a first antenna patch and a second antenna patch of the antenna. The first patch may be electrically connected to the coaxial interconnect, and the second patch may be mounted on the molded layer. The molded layer may be formed from a molding compound, and may have a stiffness to resist warpage during fabrication and use of the semiconductor package.

公开(公告)号：US20200168569A1

公开(公告)日：2020-05-28

申请号：US16481385

申请日：2017-03-30

申请人： Intel Corporation

发明人： Sai VADLAMANI ,  Aleksandar ALEKSOV ,  Rahul JAIN ,  Kyu Oh LEE ,  Kristof Kuwawi DARMAWIKARTA ,  Robert Alan MAY ,  Sri Ranga Sai BOYAPATI ,  Telesphor KAMGAING

IPC分类号： H01L23/66 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

摘要： Semiconductor packages having a first layer interconnect portion that includes a coaxial interconnect between a die and a package substrate are described. In an example, the package substrate includes a substrate-side coaxial interconnect electrically connected to a signal line. The die is mounted on the package substrate and includes a die-side coaxial interconnect coupled to the substrate-side coaxial interconnect. The coaxial interconnects can be joined by a solder bond between respective central conductors and shield conductors.

公开(公告)号：US20190393172A1

公开(公告)日：2019-12-26

申请号：US16481392

申请日：2017-03-30

申请人： Intel Corporation

发明人： Srinivas V. PIETAMBARAM ,  Rahul N. MANEPALLI ,  Kristof Kuwawi DARMAWIKARTA ,  Robert Alan MAY ,  Aleksandar ALEKSOV ,  Telesphor KAMGAING

IPC分类号： H01L23/66 ,  H01L21/56 ,  H01L23/00

摘要： Semiconductor packages having a die electrically connected to an antenna by a coaxial interconnect are described. In an example, a semiconductor package includes a molded layer between a first antenna patch and a second antenna patch of the antenna. The first patch may be electrically connected to the coaxial interconnect, and the second patch may be mounted on the molded layer. The molded layer may be formed from a molding compound, and may have a stiffness to resist warpage during fabrication and use of the semiconductor package.

公开(公告)号：US20190393109A1

公开(公告)日：2019-12-26

申请号：US16481216

申请日：2017-03-30

申请人： Intel Corporation

发明人： Lisa Ying Ying CHEN ,  Lauren Ashley LINK ,  Robert Alan MAY ,  Amruthavalli Pallavi ALUR ,  Kristof Kuwawi DARMAWIKARTA ,  Siddharth K. ALUR ,  Sri Ranga Sai BOYAPATI ,  Andrew James BROWN ,  Lilia MAY

IPC分类号： H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  C04B35/622 ,  C04B35/64

摘要： Semiconductor packages including package substrates having polymer-derived ceramic cores are described. In an example, a package substrate includes a core layer including a polymer-derived ceramic. The polymer-derived ceramic may include filler particles to control shrinkage and reduce warpage of the core layer during fabrication and use of the package substrate. The core layer may include counterbores or blind holes to embed a contact pad or an electrical interconnect in the core layer. A semiconductor die may be mounted on the package substrate and may be electrically connected to the contact pad or the electrical interconnect.