公开(公告)号：US20220415890A1

公开(公告)日：2022-12-29

申请号：US17359320

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Mohammad HASAN ,  Biswajeet GUHA ,  Oleg GOLONZKA ,  Leonard P. GULER ,  Leah SHOER ,  Daniel G. OUELLETTE ,  Pedro FRANCO NAVARRO ,  Tahir GHANI

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/78

Abstract: Integrated circuit structures having metal gates with tapered plugs, and methods of fabricating integrated circuit structures having metal gates with tapered plugs, are described. For example, includes a fin having a portion protruding above a shallow trench isolation (STI) structure. A gate dielectric material layer is over the protruding portion of the fin and over the STI structure. A conductive gate layer is over the gate dielectric material layer. A conductive gate fill material is over the conductive gate layer. A dielectric gate plug is laterally spaced apart from the fin. The dielectric gate plug is on the STI structure, and the dielectric gate plug has sides tapered outwardly from a top of the dielectric gate plug to a bottom of the dielectric gate plug.