-
1.
公开(公告)号:US20220100679A1
公开(公告)日:2022-03-31
申请号:US17033745
申请日:2020-09-26
Applicant: Intel Corporation
Inventor: MAHESH NATU , ANAND K. ENAMANDRAM , MANJULA PEDDIREDDY , ROBERT A. BRANCH , TIFFANY J. KASANICKY , SIDDHARTHA CHHABRA , HORMUZD KHOSRAVI
Abstract: Systems, methods, and apparatuses to implement spatially unique and location independent persistent memory encryption are described. In one embodiment, a system on a chip (SoC) includes at least one persistent range register to indicate a persistent range of memory, an address modifying circuit to check if an address for a memory store request is within the persistent range indicated by the at least one persistent range register, and append a unique identifier value, for a component corresponding to the memory store request for the address, to the address to generate a modified address and output the modified address as an output address when the address is within the persistent range, and output the address as the output address when the address is not within the persistent range, and an encryption engine circuit to generate a ciphertext based on the output address.
-
公开(公告)号:US20200167221A1
公开(公告)日:2020-05-28
申请号:US16203578
申请日:2018-11-28
Applicant: Intel Corporation
Inventor: BALAJI VEMBU , BRYAN WHITE , ANKUR SHAH , MURALI RAMADOSS , DAVE PUFFER , ALTUG KOKER , ADITYA NAVALE , MAHESH NATU
Abstract: Apparatus and method for scalable error reporting. For example, one embodiment of an apparatus comprises error detection circuitry to detect an error in a component of a first tile within a tile-based hierarchy of a processing device; error classification circuitry to classify the error and record first error data based on the classification; a first tile interface to combine the first error data with second error data received from one or more other components associated with the first tile to generate first accumulated error data; and a master tile interface to combine the first accumulated error data with second accumulated error data received from at least one other tile interface to generate second accumulated error data and to provide the second accumulated error data to a host executing an application to process the second accumulated error data.
-