-
公开(公告)号:US20210373934A1
公开(公告)日:2021-12-02
申请号:US17404897
申请日:2021-08-17
Applicant: Intel Corporation
Inventor: Sanjay KUMAR , Rajesh M. SANKARAN , Gilbert NEIGER , Philip R. LANTZ , Jason W. BRANDT , Vedvyas SHANBHOGUE , Utkarsh Y. KAKAIYA , Kun TIAN
IPC: G06F9/455 , G06F9/30 , G06F12/1045 , G06F12/109
Abstract: Implementations of the disclosure provide a processing device comprising an address translation circuit to intercept a work request from an I/O device. The work request comprises a first ASID to map to a work queue. A second ASID of a host is allocated for the first ASID based on the work queue. The second ASID is allocated to at least one of: an ASID register for a dedicated work queue (DWQ) or an ASID translation table for a shared work queue (SWQ). Responsive to receiving a work submission from the SVM client to the I/O device, the first ASID of the application container is translated to the second ASID of the host machine for submission to the I/O device using at least one of: the ASID register for the DWQ or the ASID translation table for the SWQ based on the work queue associated with the I/O device.
-
公开(公告)号:US20220107910A1
公开(公告)日:2022-04-07
申请号:US17550977
申请日:2021-12-14
Applicant: Intel Corporation
Inventor: Sanjay KUMAR , Rajesh M. SANKARAN , Philip R. LANTZ , Utkarsh Y. KAKAIYA , Kun TIAN
Abstract: Implementations of the disclosure provide processing device comprising: an interrupt managing circuit to receive an interrupt message directed to an application container from an assignable interface (AI) of an input/output (I/O) device. The interrupt message comprises an address space identifier (ASID), an interrupt handle and a flag to distinguish the interrupt message from a direct memory access (DMA) message. Responsive to receiving the interrupt message, a data structure associated with the interrupt managing circuit is identified. An interrupt entry from the data structure is selected based on the interrupt handle. It is determined that the ASID associated with the interrupt message matches an ASID in the interrupt entry. Thereupon, an interrupt in the interrupt entry is forwarded to the application container.
-