公开(公告)号：US20220197367A1

公开(公告)日：2022-06-23

申请号：US17127899

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Deepak S Kirubakaran ,  Ramakrishnan Sivakumar ,  Russell Fenger ,  Monica Gupta ,  Jianwei Dai ,  Premanand Sakarda ,  Guy Therien ,  Rajshree Chabukswar ,  Chad Gutierrez ,  Renji Thomas

IPC: G06F1/3287 ,  G06F1/3228

Abstract: A hardware and software coordinated processor power state policy (e.g., policy for C-state) that delivers optimal power state selection by taking in to account the performance and/or responsiveness needs of thread expected to be scheduled on the core entering idle, to achieve improved IPC and performance for cores running user critical tasks. The scheme provides the ability to deliver responsiveness gains for important and/or user-critical threads running on a system-on-chip. A power management controller coupled to the plurality of processing cores, wherein the power management controller receives a hint from an operating system indicative of a bias towards a power state or performance state for at least one of the processing cores of the plurality of processing cores based on a priority of a thread in context switch.

公开(公告)号：US12141015B2

公开(公告)日：2024-11-12

申请号：US17127899

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Deepak S Kirubakaran ,  Ramakrishnan Sivakumar ,  Russell Fenger ,  Monica Gupta ,  Jianwei Dai ,  Premanand Sakarda ,  Guy Therien ,  Rajshree Chabukswar ,  Chad Gutierrez ,  Renji Thomas

IPC: G06F1/3287 ,  G06F1/3228

Abstract: A hardware and software coordinated processor power state policy (e.g., policy for C-state) that delivers optimal power state selection by taking in to account the performance and/or responsiveness needs of thread expected to be scheduled on the core entering idle, to achieve improved IPC and performance for cores running user critical tasks. The scheme provides the ability to deliver responsiveness gains for important and/or user-critical threads running on a system-on-chip. A power management controller coupled to the plurality of processing cores, wherein the power management controller receives a hint from an operating system indicative of a bias towards a power state or performance state for at least one of the processing cores of the plurality of processing cores based on a priority of a thread in context switch.

公开(公告)号：US20200326994A1

公开(公告)日：2020-10-15

申请号：US16914177

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Carin Ruiz ,  Bo Qiu ,  Columbia Mishra ,  Arijit Chattopadhyay ,  Chee Lim Nge ,  Srikanth Potluri ,  Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Akhilesh Rallabandi ,  Mark Gallina ,  Renji Thomas ,  James Hermerding II

IPC: G06F9/50 ,  G06F9/48 ,  G06F11/30

Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

公开(公告)号：US11972303B2

公开(公告)日：2024-04-30

申请号：US16914177

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Carin Ruiz ,  Bo Qiu ,  Columbia Mishra ,  Arijit Chattopadhyay ,  Chee Lim Nge ,  Srikanth Potluri ,  Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Akhilesh Rallabandi ,  Mark Gallina ,  Renji Thomas ,  James Hermerding, II

IPC: G06F9/50 ,  G06F9/48 ,  G06F11/30

CPC classification number: G06F9/5094 ,  G06F9/4881 ,  G06F9/505 ,  G06F11/3058 ,  G06F2209/508

Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

公开(公告)号：US11782755B2

公开(公告)日：2023-10-10

申请号：US16729026

申请日：2019-12-27

Applicant: Intel Corporation

Inventor： Renji Thomas ,  Chris Binns ,  Pietro Mercati ,  Jianfang Zhu ,  Ashraf H. Wadaa ,  Michael Kishinevsky ,  Ahmed Shams

IPC: G06F9/46 ,  G06F9/48 ,  G06F11/34 ,  G06F30/20 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/3836 ,  G06F11/3433 ,  G06F30/20

Abstract: An apparatus comprising: a model to generate adjusted tuning parameters of a thread scheduling policy based on a tradeoff indication value of a target system; and a workload monitor to: execute a workload based on the thread scheduling policy; obtain a performance score and a power score from the target system based on execution of the workload, the performance score and the power score corresponding to a tradeoff indication value; compare the tradeoff indication value to a criterion; and based on the comparison, initiate the model to re-adjust the adjusted tuning parameters.