公开(公告)号：US11948906B2

公开(公告)日：2024-04-02

申请号：US16785014

申请日：2020-02-07

Applicant: INTEL CORPORATION

Inventor： Feras Eid ,  Joe Walczyk ,  Weihua Tang ,  Akhilesh Rallabandi ,  Marco Aurelio Cartas Ayala

IPC: H01L23/00

CPC classification number: H01L24/29 ,  H01L2224/29287 ,  H01L2224/29293 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2924/14 ,  H01L2924/351

Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.

公开(公告)号：US20210329811A1

公开(公告)日：2021-10-21

申请号：US17359134

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Mark MacDonald ,  Akhilesh Rallabandi ,  Ellann Cohen ,  Michael Nakanishi ,  John Carver ,  Arturo Navarro Alvarez ,  Oleg Krishcko

IPC: H05K7/20

Abstract: Sub-ambient cooling systems with condensation mitigation for use with electronic devices are disclosed. An example sub-ambient cooling assembly disclosed herein includes a heat spreader to remove heat from an electronic component. A thermal electric cooler that is to remove heat from the heat spreader. A heat exchanger to remove heat from the thermal electric cooler, where the thermal electric cooler is positioned between the heat spreader and the heat exchanger. A shroud is to at least partially surround the heat spreader and the thermal electric cooler, where the heat exchanger is to transfer heat to the shroud to increase a surface temperature of the shroud.

公开(公告)号：US20210249375A1

公开(公告)日：2021-08-12

申请号：US16785014

申请日：2020-02-07

Applicant: INTEL CORPORATION

Inventor： Feras Eid ,  Joe Walczyk ,  Weihua Tang ,  Akhilesh Rallabandi ,  Marco Aurelio Cartas Ayala

IPC: H01L23/00

Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.

公开(公告)号：US20200326994A1

公开(公告)日：2020-10-15

申请号：US16914177

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Carin Ruiz ,  Bo Qiu ,  Columbia Mishra ,  Arijit Chattopadhyay ,  Chee Lim Nge ,  Srikanth Potluri ,  Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Akhilesh Rallabandi ,  Mark Gallina ,  Renji Thomas ,  James Hermerding II

IPC: G06F9/50 ,  G06F9/48 ,  G06F11/30

Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

公开(公告)号：US20240203926A1

公开(公告)日：2024-06-20

申请号：US18593775

申请日：2024-03-01

Applicant: Intel Corporation

Inventor： Feras Eid ,  Joe Walczyk ,  Weihua Tang ,  Akhilesh Rallabandi ,  Marco Aurelio Cartas Ayala

IPC: H01L23/00

CPC classification number: H01L24/29 ,  H01L2224/29287 ,  H01L2224/29293 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2924/14 ,  H01L2924/351

Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.

公开(公告)号：US11972303B2

公开(公告)日：2024-04-30

申请号：US16914177

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Carin Ruiz ,  Bo Qiu ,  Columbia Mishra ,  Arijit Chattopadhyay ,  Chee Lim Nge ,  Srikanth Potluri ,  Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Akhilesh Rallabandi ,  Mark Gallina ,  Renji Thomas ,  James Hermerding, II

IPC: G06F9/50 ,  G06F9/48 ,  G06F11/30

CPC classification number: G06F9/5094 ,  G06F9/4881 ,  G06F9/505 ,  G06F11/3058 ,  G06F2209/508

Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

公开(公告)号：US20230317556A1

公开(公告)日：2023-10-05

申请号：US17710658

申请日：2022-03-31

Applicant: Intel Corporation

Inventor： Akhilesh Rallabandi ,  Feras Eid

IPC: H01L23/467

CPC classification number: H01L23/467

Abstract: A modification structure may be formed within a chassis of an electronic product to improve its thermal dissipation systems, to lessen its weight, and/or to enhance its durability, while maintaining the industrial design/esthetics/ergonomics thereof, wherein the modification structure may comprise a plurality of fused modification material particles. The modification structures may have a higher thermal conductivity than the chassis, may have a lower thermal conductivity than the chassis, may have a lower density than the chassis, and/or may have a higher yield strength than the chassis. In a specific example, the modification structure may extend entirely through the chassis and be sufficiently porous to allow air flow to assist in heat dissipation from the electronic product.

公开(公告)号：US20230266070A1

公开(公告)日：2023-08-24

申请号：US17677829

申请日：2022-02-22

Applicant: Intel Corporation

Inventor： Feras Eid ,  Akhilesh Rallabandi

IPC: F28D15/04 ,  F28D15/02 ,  H05K7/20

CPC classification number: F28D15/046 ,  F28D15/043 ,  F28D15/0275 ,  H05K7/20336

Abstract: A heat dissipation device for an integrated circuit assembly may be fabricated to include at least one heat pipe that is at least partially embedded in a base plate that is formed with an additive manufacturing process, such as cold spraying. Embedding the at least one heat pipe in the base plate, rather than soldering the heat pipe to the base plate, eliminates the thermal bottleneck presented by the soldering material and reduces the overall height or thickness of the integrated circuit assembly.

公开(公告)号：US20220214730A1

公开(公告)日：2022-07-07

申请号：US17697631

申请日：2022-03-17

Applicant: Intel Corporation

Inventor： Arturo Navarro Alvarez ,  Jose Diaz Marin ,  Mark MacDonald ,  Akhilesh Rallabandi ,  Jose Salazar Delgado

IPC: G06F1/20 ,  H05K7/20

Abstract: Liquid cooling systems and coolers for electronic devices are disclosed herein. An example cooler includes a first thermal block having a first fluid passageway, a second thermal block having a second fluid passageway, and a thermoelectric cooler (TEC) coupled between the first thermal block and the second thermal block. The second thermal block is to be disposed on a processor of an electronic device such that the second thermal block is disposed between the TEC and the processor.