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公开(公告)号:US20210224267A1
公开(公告)日:2021-07-22
申请号:US17227045
申请日:2021-04-09
Applicant: Intel Corporation
Inventor: Sourabh DONGAONKAR , Jawad B. KHAN , Chetan CHAUHAN , Dipanjan SENGUPTA , Mariano TEPPER , Theodore WILLKE , Richard L. COULSON
IPC: G06F16/2458 , G06F16/248 , G06F16/21 , G06F16/22 , G06N7/00
Abstract: Technologies for tuning performance and/or accuracy of similarity search using stochastic associative memories (SAM). Under a first subsampling approach, columns associated with set bits in a search key comprising a binary bit vector are subsampled. Matching set bits for the subsampled columns are aggregated on a row-wise basis to generate similarity scores, which are then ranked. A similar scheme is applied for all the columns with set bits in the search key and the results for top ranked rows are compared to evaluate a tradeoff between throughput boost versus lost accuracy. A second approach called continuous column read, and iterative approach is employed that continuously scores the rows as each new column read is complete. The similarity scores for an N-1 and Nth-1 iteration are ranked, a rank correlation is calculated, and a determination is made to whether the rank correlation meets or exceeds a threshold.
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2.
公开(公告)号:US20200219580A1
公开(公告)日:2020-07-09
申请号:US16827235
申请日:2020-03-23
Applicant: Intel Corporation
Inventor: Jawad B. KHAN , Richard L. COULSON , Zion S. KWOK , Ravi H. MOTWANI
IPC: G11C29/42 , G11C29/44 , G11C29/02 , G11C11/409 , G11C5/02
Abstract: Error correction values for a memory device include row error correction values and column error correction values for the same memory array. The memory device includes a memory array that is addressable in two spatial dimensions: a row dimension and a column dimension. The memory array is written as rows of data, and can be read as rows in the row dimension or read as columns in the column dimension. A data write triggers updates to row error correction values and to column error correction values.
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