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公开(公告)号:US20220199888A1
公开(公告)日:2022-06-23
申请号:US17133604
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Sahar Daraeizadeh , Shavindra Premaratne , Anindya Sankar Paul , Anne Y. Matsuura
Abstract: Apparatus and methods for real time calibration of qubits in a quantum processor. For example, one embodiment of an apparatus comprises: a quantum processor comprising a plurality of qubits, each of the qubits having a state; a quantum controller to generate sequences of electromagnetic (EM) pulses to manipulate the states of the plurality of qubits based on a set of control parameters; a qubit measurement unit to measure one or more sensors associated with a corresponding one or more of the qubits of the plurality of qubits to produce one or more corresponding measured values; and a machine-learning engine to evaluate the one or more measured values in accordance with a machine-learning process to generate updated control parameters, wherein the quantum controller is to use the updated control parameters to generate subsequent sequences of EM pulses to manipulate the states of the plurality of qubits.
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公开(公告)号:US20240104413A1
公开(公告)日:2024-03-28
申请号:US17954131
申请日:2022-09-27
Applicant: Intel Corporation
Inventor: Todor Mladenov , Sahar Daraeizadeh , Anne Matsuura
IPC: G06N10/20
CPC classification number: G06N10/20
Abstract: Technologies for a hybrid digital/analog processor for a quantum computer are disclosed. In the illustrative embodiment, a hybrid digital/analog processor may be able to process digital instructions as well as analog instructions. The digital instructions may be, e.g., read from or write to memory or registers, perform an arithmetic operation, perform a branch, etc. The analog instructions may be to, e.g., provide an analog voltage to a particular electrode of a qubit, provide an analog pulse to a qubit, measure a reflection of an analog signal from a qubit, etc. The integration of analog operations in the hybrid digital/analog processor can improve performance by, e.g., lowering latency and lowering power usage.
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公开(公告)号:US11550977B2
公开(公告)日:2023-01-10
申请号:US16261113
申请日:2019-01-29
Applicant: Intel Corporation
Inventor: Sahar Daraeizadeh , Anne Matsuura , Xiang Zou , Sonika Johri
Abstract: Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.
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公开(公告)号:US20250021849A1
公开(公告)日:2025-01-16
申请号:US18220212
申请日:2023-07-10
Applicant: Intel Corporation
Inventor: Sahar Daraeizadeh , Todor Mladenov , Xiang Zou , Anne Matsuura
IPC: G06N10/20
Abstract: Apparatus and method for a quantum control processor. For example, one embodiment of a QCP comprises: instruction fetch logic to fetch instructions from a memory, the instructions including quantum instructions; decode logic to decode the quantum instructions into a first plurality of quantum microoperations; translation logic translate the first plurality of quantum microoperations into a second plurality of quantum microoperations based on characteristics of a plurality of quantum controller cores coupled to the quantum control processor; and issue logic to synchronously issue the second plurality of quantum microoperations in parallel to the plurality of quantum controller cores.
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公开(公告)号:US20200242208A1
公开(公告)日:2020-07-30
申请号:US16261113
申请日:2019-01-29
Applicant: Intel Corporation
Inventor: Sahar Daraeizadeh , Anne Matsuura , Xiang Zou , Sonika Johri
Abstract: Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.
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公开(公告)号:US12016252B2
公开(公告)日:2024-06-18
申请号:US17133604
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Sahar Daraeizadeh , Shavindra Premaratne , Anindya Sankar Paul , Anne Y. Matsuura
Abstract: Apparatus and methods for real time calibration of qubits in a quantum processor. For example, one embodiment of an apparatus comprises: a quantum processor comprising a plurality of qubits, each of the qubits having a state; a quantum controller to generate sequences of electromagnetic (EM) pulses to manipulate the states of the plurality of qubits based on a set of control parameters; a qubit measurement unit to measure one or more sensors associated with a corresponding one or more of the qubits of the plurality of qubits to produce one or more corresponding measured values; and a machine-learning engine to evaluate the one or more measured values in accordance with a machine-learning process to generate updated control parameters, wherein the quantum controller is to use the updated control parameters to generate subsequent sequences of EM pulses to manipulate the states of the plurality of qubits.
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公开(公告)号:US11526793B2
公开(公告)日:2022-12-13
申请号:US16152311
申请日:2018-10-04
Applicant: INTEL CORPORATION
Inventor: Sahar Daraeizadeh , Anne Matsuura , Justin Hogaboam
IPC: G06N10/00 , G06T15/00 , G06N7/00 , G06F30/3308
Abstract: Apparatus and method for a full quantum state simulation. A quantum state simulation system may include a simulation configurator to map quantum register state data of a quantum processor at a first time to a representational data structure and generate a first quantum state image based on the representational data structure. The quantum state simulation system may also include a quantum state simulator to simulate the quantum register state data at a second time using the quantum register state data in the first quantum state image to update a second quantum state image, and store the first and second quantum state images to a data store.
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