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公开(公告)号：US20180059751A1
公开(公告)日：2018-03-01
申请号：US15804020
申请日：2017-11-06
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
CPC分类号： G06F1/26 , G06F1/3243 , G06F1/3296 , G06F9/5094 , Y02D10/152 , Y02D10/172 , Y02D10/22
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US20180203694A1
公开(公告)日：2018-07-19
申请号：US15406996
申请日：2017-01-16
申请人： Intel Corporation
CPC分类号： G06F9/30032 , G06F9/30178 , G06F9/3824 , G06F9/3857 , G06F9/3873 , G06T1/20
摘要： Execution unit and floating point unit pipelines may be selectively bypassed in some cases to improve execution unit performance and reduce power consumption. For example, instructions that do not need the operations provided by those pipelines can benefit from bypassing pipelines. By performing a write as soon as the operands are read from a register file, power consumption may be reduced and performance may be increased in some embodiments. In addition, the write can be done in the same cycle with the read so that no additional cycles may be needed in some embodiments for the write after read.
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公开(公告)号：US20200019221A1
公开(公告)日：2020-01-16
申请号：US16578641
申请日：2019-09-23
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26 , G06F1/3296 , G06F1/3234 , G06F9/50
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US20180341306A1
公开(公告)日：2018-11-29
申请号：US16056964
申请日：2018-08-07
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
CPC分类号： G06F1/26 , G06F1/3243 , G06F1/3296 , G06F9/5094 , Y02D10/152 , Y02D10/172 , Y02D10/22
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US09823719B2
公开(公告)日：2017-11-21
申请号：US13906652
申请日：2013-05-31
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
CPC分类号： G06F1/26 , G06F1/3243 , G06F1/3296 , G06F9/5094 , Y02D10/152 , Y02D10/172 , Y02D10/22
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US20220004237A1
公开(公告)日：2022-01-06
申请号：US17479004
申请日：2021-09-20
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26 , G06F9/50 , G06F1/3234 , G06F1/3296
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US11157052B2
公开(公告)日：2021-10-26
申请号：US16578641
申请日：2019-09-23
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26 , G06F9/50 , G06F1/3234 , G06F1/3296
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US10429913B2
公开(公告)日：2019-10-01
申请号：US16056964
申请日：2018-08-07
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26 , G06F1/32 , G06F1/3234 , G06F1/3296 , G06F9/50
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US10409346B2
公开(公告)日：2019-09-10
申请号：US16056949
申请日：2018-08-07
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
IPC分类号： G06F1/26 , G06F1/32 , G06F1/3234 , G06F1/3296 , G06F9/50
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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公开(公告)号：US10146283B2
公开(公告)日：2018-12-04
申请号：US15804020
申请日：2017-11-06
申请人： Intel Corporation
发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
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