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公开(公告)号：US20220254090A1
公开(公告)日：2022-08-11
申请号：US17677118
申请日：2022-02-22
Applicant: INTEL CORPORATION
Inventor： Prasoonkumar SURTI , Carsten BENTHIN , Karthik VAIDYANATHAN , Philip LAWS , Scott JANUS , Sven WOOP
Abstract: Cluster of acceleration engines to accelerate intersections. For example, one embodiment of an apparatus comprises: a set of graphics cores to execute a first set of instructions of a primary graphics thread; a scalar cluster comprising a plurality of scalar execution engines; and a communication fabric interconnecting the set of graphics cores and the scalar cluster; the set of graphics cores to offload execution of a second set of instructions associated with ray traversal and/or intersection operations to the scalar cluster; the scalar cluster comprising a plurality of local memories, each local memory associated with one of the scalar execution engines, wherein each local memory is to store a portion of a hierarchical acceleration data structure required by an associated scalar execution engine to execute one or more of the second set of instructions; the plurality of scalar execution engines to store results of the execution of the second set of instructions in a memory accessible by the set of graphics cores; wherein the set of graphics cores are to process the results within the primary graphics thread.
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公开(公告)号：US20210049808A1
公开(公告)日：2021-02-18
申请号：US17003011
申请日：2020-08-26
Applicant: INTEL CORPORATION
Inventor： Scott JANUS , Prasoonkumar SURTI , Karthik VAIDYANATHAN , Alexey SUPIKOV , Gabor LIKTOR , Carsten BENTHIN , Philip LAWS , Michael DOYLE
Abstract: Apparatus and method for a hierarchical beam tracer. For example, one embodiment of an apparatus comprises: a beam generator to generate beam data associated with a beam projected into a graphics scene; a bounding volume hierarchy (BVH) generator to generate BVH data comprising a plurality of hierarchically arranged BVH nodes; a hierarchical beam-based traversal unit to determine whether the beam intersects a current BVH node and, if so, to responsively subdivide the beam into N child beams to test against the current BVH node and/or to traverse further down the BVH hierarchy to select a new BVH node, wherein the hierarchical beam-based traversal unit is to iteratively subdivide successive intersecting child beams and/or to continue to traverse down the BVH hierarchy until a leaf node is reached with which at least one final child beam is determined to intersect; the hierarchical beam-based traversal unit to generate a plurality of rays within the final child beam; and intersection hardware logic to perform intersection testing for any rays intersecting the leaf node, the intersection testing to determine intersections between the rays intersecting the leaf node and primitives bounded by the leaf node.
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公开(公告)号：US20240233244A1
公开(公告)日：2024-07-11
申请号：US18413286
申请日：2024-01-16
Applicant: INTEL CORPORATION
Inventor： Scott JANUS , Prasoonkumar SURTI , Karthik VAIDYANATHAN , Alexey SUPIKOV , Gabor LIKTOR , Carsten BENTHIN , Philip LAWS , Michael DOYLE
CPC classification number: G06T15/06 , G06T1/60 , G06T15/005 , G06T17/005 , G06T2210/21
Abstract: Apparatus and method for a hierarchical beam tracer. For example, one embodiment of an apparatus comprises: a beam generator to generate beam data associated with a beam projected into a graphics scene; a bounding volume hierarchy (BVH) generator to generate BVH data comprising a plurality of hierarchically arranged BVH nodes; a hierarchical beam-based traversal unit to determine whether the beam intersects a current BVH node and, if so, to responsively subdivide the beam into N child beams to test against the current BVH node and/or to traverse further down the BVH hierarchy to select a new BVH node, wherein the hierarchical beam-based traversal unit is to iteratively subdivide successive intersecting child beams and/or to continue to traverse down the BVH hierarchy until a leaf node is reached with which at least one final child beam is determined to intersect; the hierarchical beam-based traversal unit to generate a plurality of rays within the final child beam; and intersection hardware logic to perform intersection testing for any rays intersecting the leaf node, the intersection testing to determine intersections between the rays intersecting the leaf node and primitives bounded by the leaf node.
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Patent Agency Ranking
公开(公告)号：US20230360272A1
公开(公告)日：2023-11-09
申请号：US17926532
申请日：2021-06-18
Applicant: Intel Corporation
Inventor： Scott JANUS , Jill BOYCE , Atul DIVEKAR , Jason TANNER , Sumit BHATIA , Penne Y. LEE
IPC: G06T9/00
CPC classification number: G06T9/00
Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement multi-plane image (MPI) compression are disclosed. Example apparatus disclosed herein include an interface to access an input multiplane image stack corresponding to a source camera viewpoint, the input multiplane image stack including a plurality of texture images and a corresponding plurality of alpha images, ones of the alpha images including pixel values representative of transparency of corresponding pixels in respective ones of the texture images. Disclosed example apparatus also include a compressed image encoder to at least one of (i) convert the plurality of texture images to a single composite texture image to generate a compressed multiplane image stack, or (ii) convert the plurality of alpha images to a single composite alpha image to generate the compressed multiplane image stack. In some disclosed examples, the interface is to output the compressed multiplane image stack.
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公开(公告)号：US20220327763A1
公开(公告)日：2022-10-13
申请号：US17723772
申请日：2022-04-19
Applicant: INTEL CORPORATION
Inventor： Scott JANUS , Prasoonkumar SURTI , Karthik VAIDYANATHAN , Alexey SUPIKOV , Gabor LIKTOR , Carsten BENTHIN , Philip LAWS , Michael DOYLE
Abstract: Apparatus and method for a hierarchical beam tracer. For example, one embodiment of an apparatus comprises: a beam generator to generate beam data associated with a beam projected into a graphics scene; a bounding volume hierarchy (BVH) generator to generate BVH data comprising a plurality of hierarchically arranged BVH nodes; a hierarchical beam-based traversal unit to determine whether the beam intersects a current BVH node and, if so, to responsively subdivide the beam into N child beams to test against the current BVH node and/or to traverse further down the BVH hierarchy to select a new BVH node, wherein the hierarchical beam-based traversal unit is to iteratively subdivide successive intersecting child beams and/or to continue to traverse down the BVH hierarchy until a leaf node is reached with which at least one final child beam is determined to intersect; the hierarchical beam-based traversal unit to generate a plurality of rays within the final child beam; and intersection hardware logic to perform intersection testing for any rays intersecting the leaf node, the intersection testing to determine intersections between the rays intersecting the leaf node and primitives bounded by the leaf node.
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公开(公告)号：US20220126210A1
公开(公告)日：2022-04-28
申请号：US17078038
申请日：2020-10-22
Applicant: Intel Corporation
Inventor： Gaurav KUMAR , Scott JANUS , Prakaram JOSHI , Changliang L. WANG
IPC: A63F13/75 , A63F13/71 , A63F13/352 , G06T15/00 , G06T17/20
Abstract: Examples described herein relate to a system that includes a central processing unit; a trusted execution environment (TEE); and a graphics processing system. In some examples, the central processing unit is to process homomorphically encrypted video game object data. In some examples, the TEE is to transpose the processed homomorphically encrypted object data to a second encryption format. In some examples, the graphics processing system is to perform a graphics processing pipeline operation on the object data in the second encryption format and provide rendered image data of the video game to a buffer. In some examples, the TEE is to receive homomorphic decryption keys and transpose the processed homomorphically encrypted object data to a second encryption format based on the homomorphic decryption keys. In some examples, the system is to inform a gaming server of a change to object data received from the gaming server to identify cheating.
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公开(公告)号：US20210407177A1
公开(公告)日：2021-12-30
申请号：US17368335
申请日：2021-07-06
Applicant: Intel Corporation
Inventor： Scott JANUS , Prasoonkumar SURTI , Karthik VAIDYANATHAN , Carsten BENTHIN , Philip LAWS
Abstract: Apparatus and method for ray tracing acceleration using a grid primitive. For example, one embodiment of an apparatus comprises: a grid primitive generator to generate a grid primitive comprising a plurality of adjacent interconnected primitives; a bitmask generator to generate a bitmask associated with the grid primitive, the bitmask comprising a plurality of bitmask values, each mask value associated with a primitive of the grid primitive; a ray tracing engine comprising traversal and intersection hardware logic to perform traversal and intersection operations in which rays are traversed through a hierarchical acceleration data structure and intersections between the rays and one or more of the adjacent interconnected primitives identified, wherein the ray tracing engine is to read the bitmask to determine a first set of primitives from the grid primitive on which to perform the traversal and intersection operations and a second set of primitives from the grid primitive on which the traversal and intersection operations will not be performed.
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公开(公告)号：US20200211264A1
公开(公告)日：2020-07-02
申请号：US16236041
申请日：2018-12-28
Applicant: Intel Corporation
Inventor： Scott JANUS , Prasoonkumar SURTI , Karthik VAIDYANATHAN , Carsten BENTHIN , Philip LAWS
Abstract: Apparatus and method for ray tracing acceleration using a grid primitive. For example, one embodiment of an apparatus comprises: a grid primitive generator to generate a grid primitive comprising a plurality of adjacent interconnected primitives; a bitmask generator to generate a bitmask associated with the grid primitive, the bitmask comprising a plurality of bitmask values, each mask value associated with a primitive of the grid primitive; a ray tracing engine comprising traversal and intersection hardware logic to perform traversal and intersection operations in which rays are traversed through a hierarchical acceleration data structure and intersections between the rays and one or more of the adjacent interconnected primitives identified, wherein the ray tracing engine is to read the bitmask to determine a first set of primitives from the grid primitive on which to perform the traversal and intersection operations and a second set of primitives from the grid primitive on which the traversal and intersection operations will not be performed.
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