公开(公告)号：US12158625B2

公开(公告)日：2024-12-03

申请号：US17132967

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Kaveh Hosseini ,  Xiaoqian Li ,  Conor O'Keeffe ,  Jing Fang ,  Kevin P. Ma ,  Shamsul Abedin

IPC: G02B6/42 ,  H01L21/66

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.

公开(公告)号：US20200174873A1

公开(公告)日：2020-06-04

申请号：US16784768

申请日：2020-02-07

Applicant: Intel Corporation

Inventor： Tina C. Toupal ,  Shamsul Abedin

IPC: G06F11/07 ,  G06F15/78 ,  G06F13/40 ,  H04L12/54 ,  G06F9/48 ,  H04B10/80

Abstract: A system level error detection and handling of the network IO in a multi-chip-package (MCP) die is provided. The error detection and handling mechanism conceived may be used between a system-on-chip (SoC) die and a different type of die, such as a die manufactured by a third-party (e.g., a high-bandwidth network IO die). To provide a timely indication in case of any part of the network is at fault, a control unit on the SoC die handles error detection on the network IO links using various indicators. After errors are detected, the control unit groups the errors into two categories: a link failure and a virtual channel failure. Such an error handling mechanism may consolidate the actions and provide consistency in hardware behavior.

公开(公告)号：US11815984B2

公开(公告)日：2023-11-14

申请号：US16784768

申请日：2020-02-07

Applicant: Intel Corporation

Inventor： Tina C. Toupal ,  Shamsul Abedin

IPC: G06F11/07 ,  G06F15/78 ,  H04L12/54 ,  G06F13/40 ,  H04B10/80 ,  G06F9/48

CPC classification number: G06F11/0757 ,  G06F9/4812 ,  G06F13/4068 ,  G06F15/7807 ,  H04B10/801 ,  H04L12/5601

Abstract: A system level error detection and handling of the network IO in a multi-chip-package (MCP) die is provided. The error detection and handling mechanism conceived may be used between a system-on-chip (SoC) die and a different type of die, such as a die manufactured by a third-party (e.g., a high-bandwidth network IO die). To provide a timely indication in case of any part of the network is at fault, a control unit on the SoC die handles error detection on the network IO links using various indicators. After errors are detected, the control unit groups the errors into two categories: a link failure and a virtual channel failure. Such an error handling mechanism may consolidate the actions and provide consistency in hardware behavior.