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1.
公开(公告)号:US20250113580A1
公开(公告)日:2025-04-03
申请号:US18374528
申请日:2023-09-28
Applicant: Intel Corporation
Inventor: Leonard Guler , Shaun Mills , Joseph D'Silva , Ehren Mannebach , Mauro Kobrinsky , Charles H. Wallace , Kalpesh Mahajan , Vivek Vishwakarma , Dincer Unluer , Jessica Panella
IPC: H01L29/417 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/786
Abstract: Devices, transistor structures, systems, and techniques are described herein related to contacting source and drain transistor structures from the device backside at small dimensions and cell sizes. A first subset of dummy contact structures are removed and backfilled with contact metal and a first etch stop material. A second subset of dummy contact structures are removed and backfilled with contact metal and a second etch stop material. Subsequent metallization contacts to the first and second contacts are made using two masking/selective etch processes such that any misalignment to the other contact type does not allow contact due to the pertinent etch stop material.
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2.
公开(公告)号:US20240332379A1
公开(公告)日:2024-10-03
申请号:US18129688
申请日:2023-03-31
Applicant: Intel Corporation
Inventor: Shaun Mills , Ehren Mannebach , Mauro Kobrinsky , Kai Loon Cheong , Makram Abd El Qader
IPC: H01L29/417 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/775
CPC classification number: H01L29/41766 , H01L21/823475 , H01L27/088 , H01L29/0673 , H01L29/41775 , H01L29/42392 , H01L29/775
Abstract: Devices, transistor structures, systems, and techniques are described herein related to backside contacts for field effect transistors formed using a backside contact etch prior to cavity spacer formation. A transistor includes semiconductor structures such as nanoribbons extending between a source and a drain. A spacer material is between a gate and the source/drain as cavity spacer fill. The spacer material is also between a portion of a backside contact and a portion of the source/drain, to eliminate a short between the backside contact and the gate.
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