公开(公告)号：US20210183761A1

公开(公告)日：2021-06-17

申请号：US16713867

申请日：2019-12-13

Applicant: Intel Corporation

Inventor： Reken Patel ,  Mohit K. Haran ,  Jeremy J. Guttman ,  Shyam B. Kadali ,  Ruth Amy Brain ,  Seyedhamed M Barghi ,  Zhenjun Zhang ,  James Jeong ,  Robert M. Bigwood ,  Charles Henry Wallace

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/311

Abstract: Disclosed herein are line patterning techniques for integrated circuit (IC) devices, as well as related devices and assemblies In some embodiments, a patterned line region of an IC device may include: a first conductive line; a second conductive line parallel to the first conductive line; a conductive bridge between the first conductive line and the second conductive line, wherein the conductive bridge is coplanar with the first conductive line and the second conductive line; and pitch-division artifacts.