公开(公告)号：US10002814B2

公开(公告)日：2018-06-19

申请号：US14195422

申请日：2014-03-03

Applicant: Intel Corporation

Inventor： Richard J. Harries ,  Sudarashan V. Rangaraj ,  Robert L. Sankman

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2224/10126 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19043 ,  H01L2224/05552

Abstract: Some embodiments of the present invention include apparatuses and methods relating to processing and packaging microelectronic devices that reduce stresses on and limit or eliminate crack propagation in the devices.