公开(公告)号：US12113055B2

公开(公告)日：2024-10-08

申请号：US16907597

申请日：2020-06-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yao-Chun Chuang ,  Yu-Chen Hsu ,  Hao Chun Liu ,  Chita Chuang ,  Chen-Cheng Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/11 ,  H01L24/13 ,  H01L25/0657 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/10125 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/14133 ,  H01L2224/14135 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/10125 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.

公开(公告)号：US20240104037A1

公开(公告)日：2024-03-28

申请号：US18216543

申请日：2023-06-29

申请人： Rambus Inc.

发明人： Scott C. Best

IPC分类号： G06F13/362 ,  G06F13/40 ,  G11C11/408 ,  G11C11/409 ,  G11C11/4096 ,  G11C14/00 ,  G11C16/10 ,  G11C16/26 ,  H01L23/00 ,  H01L23/48 ,  H01L23/50 ,  H01L23/60 ,  H01L25/065 ,  H01L27/02

CPC分类号： G06F13/362 ,  G06F13/4068 ,  G11C11/408 ,  G11C11/409 ,  G11C11/4096 ,  G11C14/0018 ,  G11C16/10 ,  G11C16/26 ,  H01L23/481 ,  H01L23/50 ,  H01L23/60 ,  H01L24/09 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/0248 ,  H01L23/48 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06503 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/15311

摘要： This application is directed to a stacked semiconductor device assembly including a plurality of identical stacked integrated circuit (IC) devices. Each IC device further includes a master interface, a channel master circuit, a slave interface, a channel slave circuit, a memory core, and a modal pad configured to receive a selection signal for the IC device to communicate data using one of its channel master circuit or its channel slave circuit. In some implementations, the IC devices include a first IC device and one or more second IC devices. In accordance with the selection signal, the first IC device is configured to communicate read/write data via the channel master circuit of the first IC device, and each of the one or more second IC devices is configured to communicate respective read/write data via the channel slave circuit of the respective second IC device.

公开(公告)号：US11935866B2

公开(公告)日：2024-03-19

申请号：US16936112

申请日：2020-07-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Jing-Cheng Lin ,  Po-Hao Tsai

IPC分类号： H01L23/00 ,  B23K1/00 ,  B23K101/42 ,  H01L21/768 ,  H01L23/498

CPC分类号： H01L24/83 ,  B23K1/0016 ,  H01L21/76898 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  B23K2101/42 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/3841 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/014 ,  H01L2224/13116 ,  H01L2924/014 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/014 ,  H01L2224/13147 ,  H01L2924/014 ,  H01L2224/13155 ,  H01L2924/014 ,  H01L2224/13113 ,  H01L2924/014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05572 ,  H01L2924/00014 ,  H01L2224/05027 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/05181 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/04941 ,  H01L2224/05186 ,  H01L2924/04953 ,  H01L2224/1146 ,  H01L2924/00012 ,  H01L2924/00013 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2224/05099 ,  H01L2924/00013 ,  H01L2224/05599 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2924/15311 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00

摘要： A semiconductor device includes a first substrate and a second substrate. The semiconductor device includes a plurality of conductive pillars between the first and second substrates. The plurality of conductive pillars includes a first conductive pillar having a first width, wherein the first width is substantially uniform along an entire first height of the first conductive pillar, a second conductive pillar having a second width, wherein the second width is substantially uniform along an entire second height of the second conductive pillar, the first width is different from the second width, and the entire first height is equal to the entire second height, and a third conductive pillar having a third width, wherein the third width is substantially uniform along an entire third height of the third conductive pillar, and the third conductive pillar is between the first conductive pillar and the second conductive pillar in the first direction.

公开(公告)号：US11894330B2

公开(公告)日：2024-02-06

申请号：US17209113

申请日：2021-03-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chun-Lin Lu ,  Kai-Chiang Wu ,  Ming-Kai Liu ,  Yen-Ping Wang ,  Shih-Wei Liang ,  Ching-Feng Yang ,  Chia-Chun Miao ,  Hao-Yi Tsai

IPC分类号： H01L23/00 ,  H01L23/498

CPC分类号： H01L24/13 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/03 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/06051 ,  H01L2224/1134 ,  H01L2224/13012 ,  H01L2224/13026 ,  H01L2224/1357 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13551 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/13611 ,  H01L2224/13616 ,  H01L2224/14051 ,  H01L2224/16058 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81416 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01322 ,  H01L2924/3512 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2224/0345 ,  H01L2924/00014 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2224/05671 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05555 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2224/13166 ,  H01L2924/00014 ,  H01L2224/13169 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13124 ,  H01L2924/00014 ,  H01L2224/13012 ,  H01L2924/00012 ,  H01L2224/13026 ,  H01L2924/00012 ,  H01L2224/13616 ,  H01L2924/014 ,  H01L2224/13611 ,  H01L2924/014 ,  H01L2224/81416 ,  H01L2924/014 ,  H01L2224/81411 ,  H01L2924/014 ,  H01L2224/81444 ,  H01L2924/014 ,  H01L2224/81447 ,  H01L2924/014 ,  H01L2224/81455 ,  H01L2924/014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014

摘要： A method of manufacturing a semiconductor device includes providing a carrier, disposing a first pad on the carrier, forming a post on the first pad, and disposing a joint adjacent to the post and the first pad to form a first entire contact interface between the first pad and the joint and a second entire contact interface between the first pad and the post. The first entire contact interface and the second entire contact interface are flat surfaces.

公开(公告)号：US11862586B2

公开(公告)日：2024-01-02

申请号：US17644383

申请日：2021-12-15

申请人： Kioxia Corporation

发明人： Mizuki Tamura

IPC分类号： H01L27/12 ,  H01L23/00

CPC分类号： H01L24/02 ,  H01L24/03 ,  H01L24/08 ,  H01L24/80 ,  H01L24/05 ,  H01L2224/0226 ,  H01L2224/02255 ,  H01L2224/03011 ,  H01L2224/0346 ,  H01L2224/03452 ,  H01L2224/03845 ,  H01L2224/05012 ,  H01L2224/05014 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05559 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/80007 ,  H01L2924/0103 ,  H01L2924/01013 ,  H01L2924/05442 ,  H01L2924/351

摘要： In one embodiment, a semiconductor device includes a first insulator, a first pad provided in the first insulator, a second insulator provided on the first insulator, and a second pad provided on the first pad in the second insulator. Furthermore, the first insulator includes a first film that is in contact with the first pad and the second insulator, and a second film provided at an interval from the first pad and the second insulator, and including a portion provided at a same height as at least a portion of the first pad.

公开(公告)号：US20230317652A1

公开(公告)日：2023-10-05

申请号：US17657162

申请日：2022-03-30

申请人： International Business Machines Corporation

发明人： Toyohiro Aoki ,  KOKI NAKAMURA ,  Takashi Hisada

IPC分类号： H01L23/00

CPC分类号： H01L24/08 ,  H01L2224/05552 ,  H01L24/16 ,  H01L24/11 ,  H01L24/03 ,  H01L24/09 ,  H01L24/05 ,  H01L24/73 ,  H01L2224/08053 ,  H01L2224/08059 ,  H01L2224/13014 ,  H01L2224/16059 ,  H01L2224/09055 ,  H01L2224/09133 ,  H01L2224/03015 ,  H01L2224/11848 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L24/32 ,  H01L2224/32145 ,  H01L2224/05557 ,  H01L24/13

摘要： A semiconductor device includes two integrated circuit (IC) chips. The first IC chip includes substrate, a spacer connected to the substrate and including holes, wherein at least one of the holes has a first shape, and solder bumps positioned in the holes, respectively. The second IC chip includes a substrate, electrode pads extending from the substrate and connected to the solder bumps, respectively. At least one of the electrode pads that corresponds to the at least one of the solder bumps has a second shape, and the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.

公开(公告)号：US20230309351A1

公开(公告)日：2023-09-28

申请号：US17879590

申请日：2022-08-02

申请人： Samsung Display Co., Ltd.

发明人： Soyoung Lee ,  Daesuk Kim ,  Yanghee Kim ,  Hyunchol Bang ,  Youngsoo Yoon ,  Ilgoo Youn ,  Bongwon Lee ,  Sukyo Jung

IPC分类号： H01L27/32 ,  G09G3/3233 ,  H01L23/00

CPC分类号： H01L27/3276 ,  G09G3/3233 ,  H01L24/05 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06051 ,  H01L2224/06155 ,  H01L2224/2929 ,  H01L2224/29499 ,  H01L2224/32013 ,  H01L2224/32227

摘要： A display apparatus includes: a substrate; a plurality of sub-pixel circuits on the substrate, each of the plurality of sub-pixel circuits including at least one transistor; a plurality of light-emitting diodes electrically connected to the plurality of sub-pixel circuits, respectively, and defining a display area; a pad at a non-display area outside the display area; a conductive line extending toward a first edge of the substrate; and a conductor electrically connecting the conductive line to the pad. The conductor overlaps with the pad, is interposed between a part of the conductive line and a part of the pad, and has an isolated shape in a plan view.

公开(公告)号：US11756883B2

公开(公告)日：2023-09-12

申请号：US16927249

申请日：2020-07-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yung-Chi Lin ,  Hsin-Yu Chen ,  Lin-Chih Huang ,  Tsang-Jiuh Wu ,  Wen-Chih Chiou

IPC分类号： H01L23/528 ,  H01L27/088 ,  H01L23/31 ,  H01L23/48 ,  H01L23/532 ,  H01L23/00 ,  H01L21/768 ,  H01L23/525

CPC分类号： H01L23/528 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/53238 ,  H01L24/13 ,  H01L27/088 ,  H01L23/525 ,  H01L23/53223 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/53271 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/0557 ,  H01L2224/05552 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2224/05572 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00

摘要： A method comprises forming a trench extending through an interlayer dielectric layer over a substrate and partially through the substrate, depositing a photoresist layer over the trench, wherein the photoresist layer partially fills the trench, patterning the photoresist layer to remove the photoresist layer in the trench and form a metal line trench over the interlayer dielectric layer, filling the trench and the metal line trench with a conductive material to form a via and a metal line, wherein an upper portion of the trench is free of the conductive material and depositing a dielectric material over the substrate, wherein the dielectric material is in the upper portion of the trench.

公开(公告)号：US11722800B2

公开(公告)日：2023-08-08

申请号：US17545591

申请日：2021-12-08

申请人： Sony Group Corporation

发明人： Shin Iwabuchi ,  Makoto Motoyoshi

IPC分类号： H04N5/378 ,  H01L27/146 ,  H01L23/00 ,  H01L23/48 ,  H01L25/18 ,  H04N5/225 ,  H04N5/369 ,  H04N5/374 ,  H04N25/75 ,  H04N23/54 ,  H04N25/76 ,  H04N25/79 ,  H01L29/788 ,  H01L29/792 ,  H10B69/00

CPC分类号： H04N25/75 ,  H01L23/481 ,  H01L24/16 ,  H01L25/18 ,  H01L27/1464 ,  H01L27/1469 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14638 ,  H01L27/14643 ,  H01L27/14689 ,  H04N23/54 ,  H04N25/76 ,  H04N25/79 ,  H01L29/788 ,  H01L29/792 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2924/0002 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1443 ,  H10B69/00 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/0002 ,  H01L2224/05552 ,  H01L2924/13091 ,  H01L2924/00

摘要： A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.

公开(公告)号：US11670615B2

公开(公告)日：2023-06-06

申请号：US17131588

申请日：2020-12-22

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Liang Wang ,  Rajesh Katkar ,  Javier A. DeLaCruz ,  Arkalgud R. Sitaram

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/532 ,  H01L23/528 ,  H01L23/10 ,  B81C1/00 ,  H05K1/11

CPC分类号： H01L24/29 ,  B81C1/00269 ,  B81C1/00293 ,  H01L23/10 ,  H01L23/49838 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53242 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  B81B2207/012 ,  B81C2203/035 ,  H01L23/562 ,  H01L24/80 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/06135 ,  H01L2224/06155 ,  H01L2224/06165 ,  H01L2224/06505 ,  H01L2224/08121 ,  H01L2224/08237 ,  H01L2224/29019 ,  H01L2224/8001 ,  H01L2224/80047 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80948 ,  H05K1/111 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05686 ,  H01L2924/053

摘要： A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.