公开(公告)号：US20200250028A1

公开(公告)日：2020-08-06

申请号：US16267323

申请日：2019-02-04

Applicant: Intel Corporation

Inventor： Naveen Prabhu VITTAL PRABHU ,  Bharat M. PATHAK ,  Aliasgar S. MADRASWALA ,  Yogesh B. WAKCHAURE ,  Violante MOSCHIANO ,  Walter DI FRANCESCO ,  Michele INCARNATI ,  Antonino Giuseppe LA SPINA

IPC: G06F11/10 ,  G11C29/44 ,  G11C29/52 ,  G11C16/10 ,  G11C11/56 ,  G06F11/07

Abstract: A memory device that has been programmed to store a single bit or multiple bits can perform a determination of a number of threshold voltages in one or more threshold voltage level regions. Based on the number of threshold voltages meeting or exceeding a threshold level, a page of bits can be read and if the bit error rate of the page of bits is below a threshold rate, the page of bits can be stored in the cells together with other bits stored in the cells and a provided additional page of bits. However, if the bit error rate of the page of bits is at or above the threshold rate, then the bit or bits stored in the cells can be error corrected and stored together with a provided additional page of bits.