公开(公告)号：US20210264559A1

公开(公告)日：2021-08-26

申请号：US17256203

申请日：2018-11-30

Applicant: INTEL CORPORATION

Inventor： Matthew ROPER ,  Zhi WANG ,  Satyeshwar SINGH ,  Kalyan KONDAPALLY ,  Daniel VETTER ,  Wei ZHANG

IPC: G06T1/20 ,  G06F9/455 ,  G06T1/60

Abstract: Apparatus and method for Implementing a virtual display. For example, one embodiment of a graphics processing apparatus comprises host execution circuitry to execute instructions to implement a host and virtualization instructions to implement a virtualized execution environment comprising a plurality of virtual machines (VMs); graphics execution circuitry to execute graphics instructions to render framebuffers on behalf of each VM, each framebuffer associated with a virtual function (VF); and a display engine comprising one or more display pipes and a plurality of display planes; wherein a dynamic mapping is to be performed to associate one or more of the framebuffers to one or more of the display planes, the dynamic mapping comprising generating a framebuffer object with framebuffer information required by a physical function (PF) of the host to update the one or more display planes.

公开(公告)号：US20210263755A1

公开(公告)日：2021-08-26

申请号：US17256204

申请日：2018-11-30

Applicant: INTEL CORPORATION

Inventor： Kun TIAN ,  Ankur SHAH ,  David COWPERTHWAITE ,  Zhi WANG ,  Zhenyu WANG ,  Kalyan KONDAPALLY ,  Jonathan BLOOMFIELD ,  Wei ZHANG

IPC: G06F9/451 ,  G06F9/455 ,  G06F9/4401 ,  G06F3/14 ,  G09G5/00

Abstract: Apparatus and method for implementing a virtual display. For example, one embodiment of a graphics processing apparatus comprises at least one configuration register to store framebuffer descriptor information for a first guest running on a first virtual machine (VM) in a virtualized execution environment of a host processor, the framebuffer descriptor information to indicate one or more display pipes assigned to the first guest; and execution circuitry to execute a first driver assigned to the first guest, the first guest to use the first driver to display a framebuffer in a plane associated with one of the display pipes in accordance with the framebuffer descriptor information.

公开(公告)号：US20220188965A1

公开(公告)日：2022-06-16

申请号：US17598267

申请日：2019-06-24

Applicant: Intel Corporation

Inventor： Weinan LI ,  Yan ZHAO ,  Zhi WANG ,  Wei ZHANG

IPC: G06T1/20 ,  G06T1/60 ,  G06F9/50

Abstract: An apparatus and method for scheduling workloads across virtualized graphics processors. For example, one embodiment of a graphics processing apparatus comprises first graphics processing resources to process graphics commands and execute graphics data; workload scheduling circuitry to schedule workloads for execution on the first graphics processing resources; and workload queuing circuitry to implement a local queue to store local workload entries, each local workload entry associated with a locally-submitted workload and an external workload queue to store external workload entries, each external workload entry associated with an externally-submitted workload submitted for execution by an external graphics processing apparatus, in one embodiment, the workload scheduling circuitry schedules the locally-submitted workloads identified in the local queue and externally-submitted workloads identified in the external workload queue for processing by specified portions of the first graphics processing resources.