公开(公告)号：US20220311114A1

公开(公告)日：2022-09-29

申请号：US17214111

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Albert SUTONO ,  Xiaoning YE

IPC: H01P3/08 ,  H01L23/498 ,  H01L23/66 ,  H01L23/528 ,  H05K1/02

Abstract: Electronic structures including a dual-stripline with crosstalk cancellation are described. In an example, a printed circuit board (PCB), a package substrate or a semiconductor die includes a dual-stripline structure. The dual-stripline structure includes a first region including a first top line vertically over a first bottom line, and a second top line vertically over a second bottom line. The dual-stripline structure also includes a second region including the first top line vertically over the second bottom line, and the second top line vertically over the first bottom line. The dual-stripline structure also includes a transition region between the first region and the second region. The first bottom line and the second bottom line cross in the transition region.

公开(公告)号：US20240237193A1

公开(公告)日：2024-07-11

申请号：US18618075

申请日：2024-03-27

Applicant: Intel Corporation

Inventor： Yi HUANG ,  Xiaoning YE ,  Kai XIAO ,  James A. McCALL ,  Yanjie ZHU

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/14

CPC classification number: H05K1/0253 ,  H05K1/117 ,  H05K1/141 ,  H05K2201/10189

Abstract: An apparatus is described. The apparatus includes a memory module. The memory module includes a first printed circuit board having a first transmission line. The first printed circuit board has memory chips disposed thereon. The memory module includes a second printed board having a second transmission line that is coupled to the first transmission line to form a signal path through the first and second printed circuit boards. The second printed circuit board has greater flexibility than the first printed circuit board. The memory module includes a connector to align an I/O that is coupled to the second transmission line with a corresponding I/O that is associated with a motherboard that is to send and/or receive a signal to and/or from the signal path.

公开(公告)号：US20210378099A1

公开(公告)日：2021-12-02

申请号：US17381092

申请日：2021-07-20

Applicant: Intel Corporation

Inventor： Phil GENG ,  Timothy Glen HANNA ,  Xiaoning YE ,  Sandeep AHUJA ,  Jacob MCMILLIAN ,  Ralph V. MIELE ,  David SHIA ,  Jeffory L. SMALLEY

IPC: H05K1/18 ,  H01L23/367 ,  H01L23/40 ,  H05K1/02

Abstract: An apparatus is described. The apparatus includes a semiconductor chip package loading assembly having a heat sink and a first magnetic material, the first magnetic material to be mechanically coupled to a first side of a printed circuit board that is opposite a second side of the printed circuit board where input/outputs (I/Os) of the semiconductor chip package interface with the printed circuit board. The first magnetic material to be positioned between the printed circuit board and a second magnetic material. The first magnetic material is to be magnetically attracted to the second magnetic material to impede movement of the heat sink.