公开(公告)号：US10949251B2

公开(公告)日：2021-03-16

申请号：US16066652

申请日：2016-04-01

申请人： Intel Corporation

发明人： Yong Jiang ,  Yuanyuan Li ,  Jianghong Du ,  Kuilin Chen ,  Thomas A. Tetzlaff

IPC分类号： G06F9/52 ,  G06F9/54 ,  G06F9/48 ,  G06F9/30 ,  G06T1/20 ,  G06F8/41

摘要： Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and report a result of an operation specified in association with the barrier synchronization request.

公开(公告)号：US10832430B2

公开(公告)日：2020-11-10

申请号：US16463456

申请日：2016-12-23

申请人： INTEL CORPORATION

发明人： Yi Wu ,  Shaojun Yao ,  Yong Jiang

IPC分类号： G06T7/557 ,  H04N13/271 ,  H04N13/218 ,  H04N13/00

摘要： A system for sub-pixel disparity estimation is described herein. The system includes a plenoptic camera, a memory, and a processor. The memory is configured to store imaging data. The processor is \coupled to the memory and the plenoptic camera. The processor is to obtain a plurality of sub-aperture views, select a subset of sub-aperture views as reference views for a disparity calculation, and calculate an integer disparity for the reference views. The processor is also to refine the integer disparity to sub-pixel disparity accuracy for the reference views and propagate the sub-pixel disparity from the reference views to other views of the plurality of sub-aperture views.

公开(公告)号：US20200320196A1

公开(公告)日：2020-10-08

申请号：US16650643

申请日：2017-12-13

申请人： INTEL CORPORATION

发明人： Danyu Bi ,  Salmin Sultana ,  Yuanyuan Li ,  Yong Jiang ,  Pramod Pesara ,  Selvakumar Panneer ,  Ravi Sahita

IPC分类号： G06F21/56 ,  G06F9/30 ,  G06F9/448 ,  G06F11/36 ,  G06F12/1009

摘要： A system for detecting malware includes a processor to collect processor trace information corresponding to an application being executed by the processor (202). The processor can also detect an invalid indirect branch instruction from the processor trace information (204) and detect at least one malware instruction being executed by the application in response to analyzing modified memory values corresponding to the invalid indirect branch (206). Additionally, the processor can block the application from accessing or modifying memory (208).

公开(公告)号：US20190042412A1

公开(公告)日：2019-02-07

申请号：US15757727

申请日：2015-09-25

申请人： Intel Corporation

发明人： Jianghong Du ,  Yong Jiang ,  Lei Shen ,  Yuanyuan Li ,  Ruijia Li ,  Lingyi Kong

IPC分类号： G06F12/084

摘要： Methods and apparatus to improve shared memory efficiency are described. In an embodiment, a first version of a code to access one or more registers as shared local memory is compiled. A second version of the same code is also compiled to access a cache as the shared local memory. The first version of the code is executed in response to comparison of a work group size of the code with a threshold value. Other embodiments are also disclosed and claimed.

公开(公告)号：US11550632B2

公开(公告)日：2023-01-10

申请号：US15775249

申请日：2015-12-24

申请人： INTEL CORPORATION

发明人： Yuanyuan Li ,  Yong Jiang ,  Linghyi Kong

IPC分类号： G06F9/50 ,  G06F9/48 ,  G06F9/54 ,  G06T1/20

摘要： A mechanism is described for facilitating efficient communication and data processing across clusters of computing machines in a heterogenous computing environment. A method includes detecting a request for processing of data using a programming framework and a programming model; facilitating interfacing between the programming framework and the programming model, wherein interfacing includes merging the programming model into the programming framework, wherein interfacing further includes integrating the programming framework with a distribution framework hosting the programming model; and calling on the distribution framework to schedule processing of a plurality of jobs based on the request.

公开(公告)号：US20220414010A1

公开(公告)日：2022-12-29

申请号：US17704340

申请日：2022-03-25

申请人： Intel Corporation

发明人： Xiaodong Qiu ,  Yong Jiang ,  Changwon Rhee ,  Cui Tang ,  Shuangpeng Zhou ,  Lei Chen ,  Danyu Bi ,  Peiqing Jiang ,  Chengxi Wu

IPC分类号： G06F12/084 ,  G06F9/48

摘要： Embodiments are generally directed to methods and apparatuses for dynamically changing data priority in a cache. An embodiment of an apparatus comprising: a priority controller to: receive a memory access request to request data; and set a priority flag for the memory access request based on an accumulated access amount of data stored in a memory block to be accessed by the memory access request to dynamically change a priority level of the requested data.

公开(公告)号：US20210035317A1

公开(公告)日：2021-02-04

申请号：US17072784

申请日：2020-10-16

申请人： Intel Corporation

发明人： Yi Wu ,  Shaojun Yao ,  Yong Jiang

IPC分类号： G06T7/557 ,  H04N13/271 ,  H04N13/218

摘要： A system for sub-pixel disparity estimation is described herein. The system includes memory circuitry to store image data and at least one processor to execute instructions to calculate a first disparity for a set of reference views. The reference views correspond to a first subset of views among a plurality of sub-aperture views represented in the image data. The at least one processor is to refine the first disparity to a second disparity for the reference views. The second disparity has higher precision than the first disparity. The at least one processor is to map the second disparity from the reference views to a second subset of views among the plurality of sub-aperture views different than the first subset of views.

公开(公告)号：US20190355139A1

公开(公告)日：2019-11-21

申请号：US16463456

申请日：2016-12-23

申请人： INTEL CORPORATION

发明人： Yi Wu ,  Shaojun Yao ,  Yong Jiang

IPC分类号： G06T7/557 ,  H04N13/271 ,  H04N13/218

摘要： A system for sub-pixel disparity estimation is described herein. The system includes a plenoptic camera, a memory, and a processor. The memory is configured to store imaging data. The processor is \coupled to the memory and the plenoptic camera. The processor is to obtain a plurality of sub-aperture views, select a subset of sub-aperture views as reference views for a disparity calculation, and calculate an integer disparity for the reference views. The processor is also to refine the integer disparity to sub-pixel disparity accuracy for the reference views and propagate the sub-pixel disparity from the reference views to other views of the plurality of sub-aperture views.

公开(公告)号：US20170372479A1

公开(公告)日：2017-12-28

申请号：US15190784

申请日：2016-06-23

申请人： INTEL CORPORATION

发明人： Gowri Somanath ,  Jiajie Yao ,  Yong Jiang

IPC分类号： G06T7/11 ,  G06T7/136 ,  G06T5/00

CPC分类号： G06T7/11 ,  G06T7/136 ,  G06T7/143 ,  G06T7/174 ,  G06T2207/10016 ,  G06T2207/10024 ,  G06T2207/10028 ,  G06T2207/20112

摘要： Techniques are provided for segmentation of objects, in videos comprising a sequence of color and depth image frames. A methodology implementing the techniques according to an embodiment includes receiving image frames, including an initial reference frame, and receiving a mask to outline a region in the reference frame that contains the object to be segmented. The method also includes calculating Gaussian mixture models associated with both the masked region and a background region external to the masked region. The method further includes segmenting the object from a current frame based on a modelling of the pixels within an active area of the current frame as a Markov Random Field of nodes for cost minimization. The costs are based in part on the Gaussian mixture models. The active area is based on the segmentation of a previous frame and on an estimation of optical flow between the previous frame and the current frame.

公开(公告)号：US09832305B2

公开(公告)日：2017-11-28

申请号：US14779512

申请日：2014-12-12

申请人： Intel Corporation

发明人： Jianghong Du ,  Yong Jiang ,  Jim S Baca

IPC分类号： H04M1/00 ,  H04M1/725 ,  G06F1/16 ,  G06F3/01 ,  A61B5/00 ,  A61B5/01 ,  A61B5/024 ,  G06F3/16 ,  H04M3/42 ,  H04M1/02

CPC分类号： H04M1/72569 ,  A61B5/0077 ,  A61B5/01 ,  A61B5/02438 ,  A61B5/4809 ,  A61B5/6898 ,  A61B2562/0219 ,  G06F1/163 ,  G06F1/1686 ,  G06F1/1694 ,  G06F3/015 ,  G06F3/165 ,  H04M1/0264 ,  H04M1/72527 ,  H04M3/42051 ,  H04M19/04

摘要： Various systems and methods for configuring a smartphone based on a user's sleep status are described herein. A compute device includes a determination module to determine a physiological state of a person and a configuration module to configure a quiet mode of the compute device based on the physiological state of the person.