公开(公告)号：US20160093711A1

公开(公告)日：2016-03-31

申请号：US14315079

申请日：2014-06-25

Applicant: Intermolecular Inc. ,  GLOBALFOUNDRIES, Inc.

Inventor： Zhendong Hong ,  Paul Besser ,  Kisik Choi ,  Amol Joshi ,  Olov Karlsson ,  Susie Tzeng

IPC: H01L29/49 ,  H01L21/285 ,  H01L29/423 ,  H01L21/28

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/28185 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66795 ,  H01L29/785

Abstract: Devices with lightly-doped semiconductor channels (e.g., FinFETs) need mid-gap (˜4.6-4.7 eV) work-function layers, preferably with low resistivity and a wide process window, in the gate stack. Tantalum carbide (TaC) has a mid-gap work function that is insensitive to thickness. TaC can be deposited with good adhesion on high-k materials or on optional metal-nitride cap layers. TaC can also serve as the fill metal, or it can be used with other fills such as tungsten (W) or aluminum (Al). The TaC may be sputtered from a TaC target, deposited by ALD or CVD using TaCl4 and TMA, or produced by methane treatment of deposited Ta. Al may be added to tune the threshold voltage.

Abstract translation: 具有轻掺杂半导体通道（例如，FinFET）的器件在栅极堆叠中需要中间隙（〜4.6-6.7eV）的功函数层，优选地具有低电阻率和宽的工艺窗口。 碳化钽（TaC）具有对厚度不敏感的中间间隙功能。 可以在高k材料或任选的金属氮化物盖层上沉积具有良好粘附性的TaC。 TaC也可以作为填充金属，也可以与钨（W）或铝（Al）等其他填料一起使用。 TaC可以从TaC靶溅射，通过ALD或CVD使用TaCl4和TMA沉积，或通过沉积的Ta的甲烷处理产生。 可以添加Al来调节阈值电压。

公开(公告)号：US20140363942A1

公开(公告)日：2014-12-11

申请号：US13915324

申请日：2013-06-11

Applicant: Intermolecular Inc.

Inventor： Zhendong Hong ,  Ashish Bodke ,  Susie Tzeng

IPC: H01L21/28 ,  H01L29/66

CPC classification number: H01L21/28097 ,  H01L21/324 ,  H01L29/4975 ,  H01L29/66795 ,  H01L29/785

Abstract: Tungsten silicide layers can be used in CMOS transistors in which the work function of the tungsten silicide layers can be tuned for use in PMOS and NMOS devices. A co-sputtering approach can be used in which silicon and tungsten are deposited on a high dielectric constant gate dielectric layer. The tungsten silicide layer can be annealed at or above a critical temperature to optimize the resistivity of the tungsten silicide layer. In some embodiments, the concentration of as-deposited tungsten silicide can be between 50 at % silicon to 80 at % silicon. The critical temperatures can be lower at higher silicon concentration, such as 700 C. at 63 at % silicon to 600 C. at 74 at % silicon.

Abstract translation: 硅化钨层可用于CMOS晶体管，其中硅化钨层的功函数可调谐用于PMOS和NMOS器件。 可以使用共溅射方法，其中硅和钨沉积在高介电常数栅极电介质层上。 硅化钨层可以在临界温度以上或高于临界温度退火，以优化硅化钨层的电阻率。 在一些实施例中，沉积的硅化钨的浓度可以在50at％的硅与80at％的硅之间。 较高的硅浓度，例如700℃，63at％硅至600℃，74at％的硅，临界温度可以较低。