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1.发明申请公开(公告)号：US20040135141A1
公开(公告)日：2004-07-15
申请号：US10248329
申请日：2003-01-09
IPC分类号： H01L029/40
CPC分类号： H01L27/0255 , H01L27/0814 , H01L2924/0002 , H01L2924/00
摘要： An electrostatic discharge protection network that uses triple well semiconductor devices either singularly or in a series configuration. The semiconductor devices are preferably in diode junction type configuration. A control network can be used to control the biasing when the semiconductor devices are used in a series configuration.
摘要翻译： 一种使用三重阱半导体器件的静电放电保护网络，其单体或串联配置。 半导体器件优选为二极管结型。 当半导体器件以串联配置使用时，可以使用控制网络来控制偏置。
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公开(公告)号：US20040060024A1
公开(公告)日：2004-03-25
申请号：US10065202
申请日：2002-09-25
IPC分类号： G06F017/50
CPC分类号： G06F17/5045 , G06F17/5068
摘要： A method and structure for designing an integrated circuit chip is disclosed. The method supplies a chip design, partitions elements of the chip design according to similarities in voltage requirements and timing of power states of the elements to create voltage islands, creates a floorplan of the voltage islands, assesses the floorplan, repeats the partitioning and the creating of the floorplan depending upon a result of the assessing process, and outputs a voltage island specification list.
摘要翻译： 公开了一种用于设计集成电路芯片的方法和结构。 该方法提供芯片设计，根据电压要求的相似性和元件的功率状态的时序来分配芯片设计的元件以创建电压岛，创建电压岛的平面图，评估平面图，重复划分和创建 取决于评估过程的结果，并输出电压岛规格表。
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公开(公告)号：US20040217805A1
公开(公告)日：2004-11-04
申请号：US10249684
申请日：2003-04-30
IPC分类号： G05F001/10
CPC分类号： G06F1/3296 , G06F1/3203 , Y02D10/172
摘要： An integrated circuit, method and system providing finer granularity dynamic voltage control without performance loss. The invention provides a means for dynamically changing a voltage level of at least one stage on a critical path for a particular cycle. In this way, optimum voltages can be provided to the stages for the given execution.
摘要翻译： 一种集成电路，方法和系统，提供更精细的粒度动态电压控制，无需性能损失。 本发明提供了用于在特定周期中动态地改变关键路径上的至少一个级的电压电平的装置。 以这种方式，可以为给定执行的阶段提供最佳电压。
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公开(公告)号：US20030197542A1
公开(公告)日：2003-10-23
申请号：US10063425
申请日：2002-04-23
IPC分类号： H03L005/00
CPC分类号： H03K19/018521
摘要： An integrated circuit comprising a first circuit powered by a first power supply. The first circuit sends a first signal referenced to the voltage of the first power supply to a second circuit powered by a second power supply. The second circuit receives the first signal and converts the first signal to a second signal of the same logical value as the first signal and is referenced to the voltage of the second power supply.
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公开(公告)号：US20040060023A1
公开(公告)日：2004-03-25
申请号：US10065201
申请日：2002-09-25
IPC分类号： G06F017/50
CPC分类号： G06F17/5045
摘要： A method and structure for designing an integrated circuit chip supplies a chip design and partitions elements of the chip design according to similarities in voltage requirements and timing of power states of the elements to create voltage islands. The invention outputs a voltage island specification list comprising power and timing information of each voltage island; and automatically, and without user intervention, synthesizes power supply networks for the voltage islands.
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公开(公告)号：US20030001642A1
公开(公告)日：2003-01-02
申请号：US09895778
申请日：2001-06-29
IPC分类号： H03K003/02
CPC分类号： H04L25/0292 , H03K19/00315 , H04L25/0266 , H04L25/0272
摘要： The present invention provides a receiver device having multiple voltage supplies that allows the output stage of the receiver device to go to a safe state whenever its voltage is disconnected or powered-down, independent of any of its normal control circuits. Furthermore, the isolation of the multiple voltage supplies provides a low skew at the output of the receiver device.
摘要翻译： 本发明提供了一种具有多个电压源的接收机设备，每当其接收到的电压断开或掉电时，接收机设备的输出级能够进入安全状态，而与其正常的控制电路无关。 此外，多个电压源的隔离在接收器件的输出处提供低偏移。
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